The efficiency of networks-on-chip (NoC) is affected by related routing algorithms. This
paper aims to develop a reliable routing mechanism in 2D mesh-based NoCs based on …

Network-on-Chip (NoC) has an efficient on-chip communication solution for Chip Multi-
Processors (CMPs) in order to overcome traditional bus connections. One of the …

The efficiency of Networks on Chip (NoC) is affected by related routing algorithms.
Moreover, clustering can be utilized to improve the performance of the related routing …

Given the advantages of network‐on‐chips (NoCs), they are rapidly improving to replace
other forms of System‐on‐Chip (SoC) designs. Although various factors improve the NoC's …

As the technology of semiconductor continues to develop, hundreds of cores will be
deployed on a signal die in the future Chip-Multiprocessors (CMPs) design. So Three …

In this paper, an adaptive routing algorithm for two-dimensional mesh network-on-chips
(NoCs) is presented. The algorithm, which is based on Dynamic XY (DyXY), is called …

Congestion-aware routing algorithms improve the network performance by selecting less
congested paths between source and destination routers. In this paper, a Global Congestion …

Network-on-Chip (NoC) is proposed as a scalable and reusable communication platform for
future embedded systems. The performance of NoC largely depends on the underlying …

With the emergence of large multi-core architectures, a volume of research has been
focused on distributing traffic evenly over the whole network. However, increase in traffic …

As the semiconductor technology continues to develop, hundreds of cores will be deployed
on a single die in the future Chip-Multiprocessors (CMPs) design. Three-Dimensional …