[PDF][PDF] Performance of diagonal mesh network on chip using NS2

PP Papalkar, MA Gaikwad - International Journal of Computer …, 2018 - researchgate.net
Accepted: 18/Aug/2018, Published: 30/Sept./2018 Abstract—Network on Chip (NoC) is an
interconnection network, which provides a network architecture to overcome limitations of …

Performance analysis of routing algorithms in mesh based network on chip using booksim simulator

W Myung, Z Qi, M Cheng - 2019 IEEE International Conference …, 2019 - ieeexplore.ieee.org
Network on Chip (NoC) that integrates a large number of nodes in a chip is a competitive
candidate to solve the problems of multi-core chip scalability and clock synchronization …

[PDF][PDF] Performance comparison of XY, OE and DY Ad routing algorithm by load variation analysis of 2-dimensional mesh topology based network-on-chip

P Parandkar, JK Dalal, S Katival - BIJIT Journal, 2012 - bvicam.in
Network on chip is a scalable and flexible communication architecture for the design of core
based System-on-Chip. Communication performance of a NOC heavily depends on routing …

[PDF][PDF] Improved extended XY on-chip routing in diametrical 2D MEsh NOC

P Ghosal, TS Das - International Journal of VLSI Design & …, 2012 - researchgate.net
ABSTRACT Network-on-Chip (NoC) is a new approach for designing the communication
subsystem among IP cores in a System-on-Chip (SoC). NoC applies networking theory and …

Performance analysis of the impact of design parameters to network-on-chip (NoC) architecture

NY Phing, MN Mohd Warip, P Ehkan… - Recent Trends in …, 2018 - Springer
Abstract Network-on-Chip (NoC) also known as on-chip interconnection network has been
proposed as a solution to System-on-Chip (SoC). The routing algorithm and topology are …

Performance evalulation of different routing algorithms in Network on Chip

JK Singh, AK Swain, TNK Reddy… - 2013 IEEE Asia Pacific …, 2013 - ieeexplore.ieee.org
Network on Chip (NoC) is a new paradigm to make the interconnections inside a System on
Chip (SoC). By the developments achieved in integrated circuits (IC) manufacturing there …

[PDF][PDF] PPNOCS: Performance and power network on chip simulator based on SystemC

M El Sayed, SA Salem, MH Awadalla… - International Journal of …, 2011 - Citeseer
As technology moves towards multi-core system-on-chips (SoCs), networks-on-chip (NoCs)
are emerging as the scalable fabric for interconnecting the cores. Network-on-Chip …

Performance evaluation of mesh-based NoCs: Implementation of a new architecture and routing algorithm

S Choudhary, S Qureshi - International Journal of Automation and …, 2012 - Springer
This paper presents the result of experiments conducted in mesh networks on different
routing algorithms, traffic generation schemes and switching schemes. A new network on …

[PDF][PDF] Cross-Base Routing over Diagonalized Mesh Network on Chip

M Ahmed, MS Gaur, V Laxmi - … of: 2010 IRAST International Congress on … - researchgate.net
Development of a new regular topology for Network on Chip (NoC) is a challenging task, as
the proposed design should meet the application specific targets of latency, throughput …

Reducing bypass‐based network‐on‐chip latency using priority mechanism

AF Noghondar, M Reshadi… - IET Computers & Digital …, 2018 - Wiley Online Library
In the movement from a multi‐core to a many‐core era, cores count on the chip increases
quickly thus interconnect plays a large role in achieving the desired performance. Network …