In this contribution we present a new CORDIC architecture called 'semi-flat'which reduces
considerably the latency time and the amount of hardware. In our semi-flat architecture the …

This paper presents two area-efficient algorithms and their architectures based on CORDIC.
While the first algorithm eliminates ROM and requires only low-complexity barrel shifters, the …

In the last decade, CORDIC algorithm has drawn wide attention from academia and industry
for various applications such as DSP, biomedical signal processing, software defined radio …

This paper shows a novel methodology to reduce the complexity in unrolled CORDIC
architectures. The methodology is based on eliminating the CORDIC stages starting from the …

The CORDIC algorithm has been widely used as a powerful and flexible generic
architecture to implement many algorithms involving non-trivial arithmetic. However, when …

A CORDIC processor with three computation modes is designed. The design targets low
power applications. A novel fine grain clock gating scheme is employed to reduce power …

This paper proposes an innovative version of the CORDIC algorithm by introducing a
parallel rotator able to rotate for more than one micro-rotation angle per time. Methods for …

This paper presents an area-time efficient CORDIC algorithm that completely eliminates the
scale-factor. By suitable selection of the order of approximation of Taylor series the …

This paper proposes an efficient FPGA implementation of a common CORDIC architecture
for circular and linear coordinates. The proposed circuit is derived from the single coordinate …

This paper proposes an efficient serial and parallel Coordinate Rotation Digital Computer
(CORDIC) architecture that is both area utilization and delay efficient and compares the two …