[PDF][PDF] Improved extended XY on-chip routing in diametrical 2D MEsh NOC

P Ghosal, TS Das - International Journal of VLSI Design & …, 2012 - researchgate.net
ABSTRACT Network-on-Chip (NoC) is a new approach for designing the communication
subsystem among IP cores in a System-on-Chip (SoC). NoC applies networking theory and …

Routing in NoC on diametrical 2D mesh architecture

P Ghosal, TS Das - Progress in VLSI Design and Test: 16th International …, 2012 - Springer
Abstract Network-on-Chip (NoC) has proven itself as a viable alternative for the on-chip
communication among processing cores in recent years. In Diametrical 2D Mesh …

A novel routing algorithm for on-chip communication in NoC on diametrical 2D mesh interconnection architecture

P Ghosal, TS Das - Advances in Computing and Information Technology …, 2013 - Springer
To meet the design productivity, scalability and signal integrity challenges of next-generation
system designs, a structured and scalable interconnection architecture, network on chip …

Diametrical mesh of tree (D2D-MoT) architecture: A novel routing solution for NoC

P Ghosal, S Karmakar - arXiv preprint arXiv:1212.2874, 2012 - arxiv.org
Network-on-chip (NoC) is a new aspect for designing of future System-On-Chips (SoC)
where a vast number of IP cores are connected through interconnection network. The …

A new congestion-aware routing algorithm in network-on-chip: 2D and 3D comparison

K Gaffour, MK Benhaoua, AH Benyamina… - International Journal of …, 2023 - Taylor & Francis
Network on-Chip (NoC) is scalable, flexible, modular communication structure for Multi/Many-
core architectures. It allows simpler interconnect models with higher bandwidth compared to …

Network on Chip for 2D Mesh Toplological Structure in HDL Enviornment

S Kumar, A Kumar, V Rana, V Sharma… - 2023 10th IEEE Uttar …, 2023 - ieeexplore.ieee.org
Network on Chip (NoC) refers to the network variant of the multiprocessor system on chip
(MPSoC). The RoC approach has been demonstrated to be one of the most effective …

[PDF][PDF] Design of efficient pipelined router architecture for 3D network on chip

B Chemli, A Zitouni, A Coelho… - International Journal of …, 2017 - pdfs.semanticscholar.org
As a relevant communication structure for integrated circuits, Network-on-Chip (NoC)
architecture has attracted a range of research topics. Compared to conventional bus …

Network-on-chip routing using Structural Diametrical 2D mesh architecture

P Ghosal, TS Das - 2012 Third International Conference on …, 2012 - ieeexplore.ieee.org
Performance of a NoC (network-on-chip) strongly depends on its underlying architecture
and related routing techniques. A structural scalable interconnection architecture may …

[PDF][PDF] Cross-Base Routing over Diagonalized Mesh Network on Chip

M Ahmed, MS Gaur, V Laxmi - … of: 2010 IRAST International Congress on … - researchgate.net
Development of a new regular topology for Network on Chip (NoC) is a challenging task, as
the proposed design should meet the application specific targets of latency, throughput …

2D hexagonal mesh Vs 3D mesh network on chip: A performance evaluation

RK Saini, M Ahmed - … Journal of Computing and Digital Systems, 2015 - journals.uob.edu.bh
3D Network on Chip (NoC) has emerged as a new platform to meet the performance
requirements and scaling challenges of System on Chip. More investigations require …