Robust, efficient distributed power amplifier achieving 96 Gbit/s with 10 dBm average output power and 3.7% PAE in 22-nm FD-SOI

U Çelik, P Reynaert - IEEE Journal of Solid-State Circuits, 2020 - ieeexplore.ieee.org
A pseudo-differential distributed power amplifier (DPA) based on complementary gain
stages is presented for wideband femtocell 5G indoor communications in 22-nm fully …
被引用次数：17 相关文章 所有 2 个版本

A compact pMOS stacked-SOI distributed power amplifier with over 100-GHz bandwidth and up to 22-dBm saturated output power

O El-Aassar, GM Rebeiz - IEEE Solid-State Circuits Letters, 2019 - ieeexplore.ieee.org
This letter presents an all-pMOS stacked-SOI distributed power amplifier (DPA) as an
alternative to conventional nMOS for higher reliable operating voltages. The pMOS-DPA …
被引用次数：18 相关文章

A cascaded multi-drive stacked-SOI distributed power amplifier with 23.5 dBm peak output power and over 4.5-THz GBW

O El-Aassar, GM Rebeiz - IEEE Transactions on Microwave …, 2020 - ieeexplore.ieee.org
This article presents a cascaded distributed power amplifier (DPA) topology with greater
than 4.5-THz gain-bandwidth (GBW) product. The DPA uses stacking with multi-drive inter …
被引用次数：28 相关文章 所有 2 个版本

A 120-GHz bandwidth CMOS distributed power amplifier with multi-drive intra-stack coupling

O El-Aassar, GM Rebeiz - IEEE Microwave and Wireless …, 2020 - ieeexplore.ieee.org
This letter presents a distributed power amplifier (DPA) topology that improves both the
power combining efficiency and the operation bandwidth. Multi-drive intra-stack coupling is …
被引用次数：25 相关文章

A DC-to-108-GHz CMOS SOI distributed power amplifier and modulator driver leveraging multi-drive complementary stacked cells

O El-Aassar, GM Rebeiz - IEEE Journal of Solid-State Circuits, 2019 - ieeexplore.ieee.org
This article proposes a complementary distributed power amplifier (DPA) using stacked gain
cells with multiple input driving signals. The stack multi-drive compensates for the increasing …
被引用次数：48 相关文章 所有 3 个版本
[PDF] ieee.org

An 0.4–2.8 GHz CMOS power amplifier with on-chip broadband-pre-distorter (BPD) achieving 36.1–38.6% PAE and 21 dBm maximum linear output power

S Mariappan, J Rajendran, YM Yusof, NM Noh… - IEEE …, 2021 - ieeexplore.ieee.org
A broadband 180 nm CMOS power amplifier (PA) operating from a frequency bandwidth of
400 MHz to 2.8 GHz is presented in this paper. The PA is integrated with an inductor-less …
被引用次数：5 相关文章 所有 6 个版本

A 21-dBm 3.7 W/mm² 28.7% PAE 64-GHz power amplifier in 22-nm FD-SOI

M Cui, C Carta, F Ellinger - IEEE Solid-State Circuits Letters, 2020 - ieeexplore.ieee.org
This letter presents the design of a 64-GHz power amplifier (PA) in a 22-nm FD-SOI CMOS
technology. Benefiting from optimized pseudodifferential cascode gain cells as well as the …
被引用次数：6 相关文章
[PDF] iczhiku.com

4.7 A Compact DC-to-108GHz Stacked-SOI Distributed PA/Driver Using Multi-Drive Inter-Stack Coupling, Achieving 1.525THz GBW, 20.8dBm Peak P1dB, and Over …

O El-Aassar, GM Rebeiz - 2019 IEEE International Solid-State …, 2019 - ieeexplore.ieee.org
Distributed amplifiers (DAs) are important circuit blocks for wireline optical links, high-
resolution imaging systems, and millimeter-wave instrumentation. A clear trade-off exits in …
被引用次数：17 相关文章 所有 2 个版本

A 25 Gb/s 60 GHz digital power amplifier in 28nm CMOS

K Dasgupta, S Daneshgar, C Thakkar… - ESSCIRC 2017-43rd …, 2017 - ieeexplore.ieee.org
This paper presents a 60 GHz class-E digital power amplifier (DPA) that generates energy-
efficient, non-constant envelope modulations up to 25 Gb/s. The DPA achieves a peak drain …
被引用次数：20 相关文章

A 3.5–9.5 GHz compact digital power amplifier with 39.3% peak PAE in 40nm CMOS technology

HJ Qian, JO Liang, X Luo - 2015 IEEE International Wireless …, 2015 - ieeexplore.ieee.org
A 3.5-9.5 GHz fully integrated digital power amplifier (DPA) with peak PAE of 39.3% in 40nm
CMOS technology intended for a polar transmitter is presented. A compact wideband DPA …
被引用次数：8 相关文章 所有 2 个版本