Split hardware transactions: true nesting of transactions using best-effort hardware transactional memory

Y Lev, JW Maessen - Proceedings of the 13th ACM SIGPLAN …, 2008 - dl.acm.org
Transactional Memory (TM) is on its way to becoming the programming API of choice for
writing correct, concurrent, and scalable programs. Hardware TM (HTM) implementations …

Optimizing hybrid transactional memory: The importance of nonspeculative operations

T Riegel, P Marlier, M Nowack, P Felber… - Proceedings of the twenty …, 2011 - dl.acm.org
Transactional memory (TM) is a speculative shared-memory synchronization mechanism
used to speed up concurrent programs. Most current TM implementations are software …

Tokentm: Efficient execution of large transactions with hardware transactional memory

J Bobba, N Goyal, MD Hill, MM Swift… - ACM SIGARCH Computer …, 2008 - dl.acm.org
Current hardware transactional memory systems seek to simplify parallel programming, but
assume that large transactions are rare, so it is acceptable to penalize their performance or …

Hybrid STM/HTM for nested transactions on OpenJDK

K Chapman, AL Hosking, JEB Moss - ACM SIGPLAN Notices, 2016 - dl.acm.org
Transactional memory (TM) has long been advocated as a promising pathway to more
automated concurrency control for scaling concurrent programs running on parallel …

Delegation and nesting in best-effort hardware transactional memory

Y Liu, S Diestelhorst, M Spear - Proceedings of the twenty-fourth annual …, 2012 - dl.acm.org
The guiding design principle behind best-effort hardware transactional memory (BEHTM) is
simplicity of implementation and verification. Only minimal modifications to the base …

Hybrid transactional memory

P Damron, A Fedorova, Y Lev, V Luchangco… - Proceedings of the 12th …, 2006 - dl.acm.org
Transactional memory (TM) promises to substantially reduce the difficulty of writing correct,
efficient, and scalable concurrent programs. But" bounded" and" best-effort" hardware TM …

[PDF][PDF] Hybrid transactional memory

M Moir, P Damron, A Fedorova, Y Lev… - Unpublished …, 2005 - research.cs.wisc.edu
Transactional memory (TM) promises to substantially reduce the difficulty of writing correct,
efficient, and scalable concurrent programs. But previous “bounded” and “best-effort” …

Software partitioning of hardware transactions

L Xiang, ML Scott - ACM SIGPLAN Notices, 2015 - dl.acm.org
Best-effort hardware transactional memory (HTM) allows complex operations to execute
atomically and in parallel, so long as hardware buffers do not overflow, and conflicts are not …

Making the fast case common and the uncommon case simple in unbounded transactional memory

C Blundell, J Devietti, EC Lewis… - ACM SIGARCH Computer …, 2007 - dl.acm.org
Hardware transactional memory has great potential to simplify the creation ofcorrect and
efficient multithreaded programs, allowing programmers to exploitmore effectively the soon …

Making nested parallel transactions practical using lightweight hardware support

W Baek, N Bronson, C Kozyrakis… - Proceedings of the 24th …, 2010 - dl.acm.org
Transactional Memory (TM) simplifies parallel programming by supporting parallel tasks that
execute in an atomic and isolated way. To achieve the best possible performance, TM must …