Estimating energy consumption for an MPSoC architectural exploration

RB Atitallah, S Niar, A Greiner, S Meftali… - … of Computing Systems …, 2006 - Springer
Early energy estimation is increasingly important in MultiProcessor System-On-Chip
(MPSoC) design. Applying traditional approaches, which consist in delaying the estimation …

Parallel high-level synthesis design space exploration for behavioral ips of exact latencies

BC Schafer - ACM Transactions on Design Automation of Electronic …, 2017 - dl.acm.org
This works presents a Design Space Exploration (DSE) method for Behavioral IPs (BIPs)
given in ANSI-C or SystemC to find the smallest micro-architecture for a specific target …

[图书][B] System-level modelling and design space exploration for multiprocessor embedded system-on-chip architectures

C Erbas - 2006 - books.google.com
Modern embedded systems come with contradictory design constraints. On one hand, these
systems often target mass production and battery-based devices, and therefore should be …

Exploring exploration: A tutorial introduction to embedded systems design space exploration

AD Pimentel - IEEE Design & Test, 2016 - ieeexplore.ieee.org
As embedded systems grow more complex and as new applications such as IoT require
many design constraints, sophisticated design space exploration techniques are essential in …

Analytic multi-core processor model for fast design-space exploration

R Jongerius, A Anghel, G Dittmann… - IEEE Transactions …, 2017 - ieeexplore.ieee.org
Simulators help computer architects optimize system designs. The limited performance of
simulators even of moderate size and detail makes the approach infeasible for design-space …

Design space pruning through hybrid analysis in system-level design space exploration

R Piscitelli, AD Pimentel - 2012 Design, Automation & Test in …, 2012 - ieeexplore.ieee.org
System-level design space exploration (DSE), which is performed early in the design
process, is of eminent importance to the design of complex multi-processor embedded …

SoCDAL: System-on-chip design AcceLerator

Y Ahn, K Han, G Lee, H Song, J Yoo, K Choi… - ACM Transactions on …, 2008 - dl.acm.org
Time-to-market pressure and the ever-growing design complexity of multiprocessor system-
on-chips have demanded an efficient design environment that enables fast exploration of …

Hierarchical design and test of integrated microsystems

T Mukherjee, GK Fedder… - IEEE Design & Test of …, 1999 - ieeexplore.ieee.org
This article presents emerging results of an integrated mixed-domain design methodology
similar to the mixed-signal design methodologies in the VLSI community. This methodology …

Accurate high-level modeling and automated hardware/software co-design for effective SoC design space exploration

W Zuo, LN Pouchet, A Ayupov, T Kim, CW Lin… - Proceedings of the 54th …, 2017 - dl.acm.org
A desirable feature of a development tool for SoC design is that, given the important
applications in the domain to be targeted by the SoC, a powerful hardware-software …

Efficient design space exploration via statistical sampling and AdaBoost learning

D Li, S Yao, YH Liu, S Wang, XH Sun - Proceedings of the 53rd Annual …, 2016 - dl.acm.org
Design space exploration (DSE) has become a notoriously difficult problem due to the
exponentially increasing size of design space of microprocessors and time-consuming …