Circuits and methods for characterizing a receiver of a communication signal
SG Asuncion, M Fanaswalla, BL Fernandes… - US Patent …, 2014 - Google Patents
Circuits and methods characterize a receiver. The circuit includes a decision feedback
equalizer (DFE) circuit, a clock and data recovery (CDR) circuit, a data checker, and an eye …
equalizer (DFE) circuit, a clock and data recovery (CDR) circuit, a data checker, and an eye …
Methods and circuits for adjusting parameters of a transceiver
P Choudhary, H Lin, A Wang, S Behtash… - US Patent …, 2019 - Google Patents
Methods and circuits for analyzing a signal and adjusting parameters of an equalizer for a
signal. The signal is received at a receiver over a channel wherein the signal has a wave …
signal. The signal is received at a receiver over a channel wherein the signal has a wave …
High speed decision feedback equalizer
BG Bhakta, S Ramaswamy, RF Payne, S Wu - US Patent 7,443,913, 2008 - Google Patents
An equalizer comprises a sampler, a filter, and a summer. The sampler samples a signal
indicative of an input communication signal to determine digital decision output signals …
indicative of an input communication signal to determine digital decision output signals …
Methods and apparatus for decision-feedback equalization with oversampled phase detector
PM Aziz, AB Healey, A Malipatil, L Zhong - US Patent 8,379,711, 2013 - Google Patents
Methods and apparatus are provided for decision-feedback equalization with an
oversampled phase detector. A method is provided for detecting data in a receiver …
oversampled phase detector. A method is provided for detecting data in a receiver …
Method and apparatus for generating one or more clock signals for a decision-feedback equalizer using DFE detected data
PM Aziz, GW Sheets, LA Smith - US Patent 7,616,686, 2009 - Google Patents
Methods and apparatus are provided for generating one or more clock signals for a decision-
feedback equalizer using DFE detected data. A received signal is sampled using a data …
feedback equalizer using DFE detected data. A received signal is sampled using a data …
Systems, circuits and methods for adapting taps of a decision feedback equalizer in a receiver
A Lin, F Bahmani - US Patent 8,416,846, 2013 - Google Patents
(57) ABSTRACT A receiver is optimized by adapting the taps of a decision feedback
equalizer component within the receiver. Data deci sions and error decisions are generated …
equalizer component within the receiver. Data deci sions and error decisions are generated …
Eye monitor for parallelized digital equalizers
J Sun, H Qian - US Patent 10,992,501, 2021 - Google Patents
An illustrative integrated receiver circuit embodiment includes: a set of analog-to-digital
converters that sample a receive signal in response to staggered clock signals to provide a …
converters that sample a receive signal in response to staggered clock signals to provide a …
One-sample-per-bit decision feedback equalizer (DFE) clock and data recovery
JA Carballo, HC Cranford Jr, GJ Nicholls… - US Patent …, 2010 - Google Patents
Disclosed are a receiver circuit, method and design architec ture of a decision feedback
equalizer (DFE) Clock-And-Data Recovery (CDR) architecture that utilizes/produces one …
equalizer (DFE) Clock-And-Data Recovery (CDR) architecture that utilizes/produces one …
Receive equalizer with adaptive loops
A Momtaz, CJ Chen, H Chen… - US Patent App. 11 …, 2007 - Google Patents
A communication receiver includes a decision feedback equalizer and clock and data
recovery circuit. Various adaptation loops may control the operation of the decision feedback …
recovery circuit. Various adaptation loops may control the operation of the decision feedback …
Data receiver circuit and method of adaptively controlling equalization coefficients using the same
W Shin, CHO Yong-Ki - US Patent 9,288,087, 2016 - Google Patents
Provided are a data receiver circuit and a method of adap tively controlling an equalization
coefficient using the same. The data receiver circuit includes n sampling receivers, in …
coefficient using the same. The data receiver circuit includes n sampling receivers, in …