Low‐cost regional‐based congestion‐aware routing algorithm for 2D mesh NoC

S Vazifedunn, A Reza… - International Journal of …, 2023 - Wiley Online Library
Given the advantages of network‐on‐chips (NoCs), they are rapidly improving to replace
other forms of System‐on‐Chip (SoC) designs. Although various factors improve the NoC's …

ParRouting: An efficient area partition-based congestion-aware routing algorithm for NoCs

J Fang, D Zhang, X Li - Micromachines, 2020 - mdpi.com
Routing algorithms is a key factor that determines the performance of NoC (Networks-on-
Chip) systems. Regional congestion awareness routing algorithms have shown great …

A new congestion-aware routing algorithm in network-on-chip: 2D and 3D comparison

K Gaffour, MK Benhaoua, AH Benyamina… - International Journal of …, 2023 - Taylor & Francis
Network on-Chip (NoC) is scalable, flexible, modular communication structure for Multi/Many-
core architectures. It allows simpler interconnect models with higher bandwidth compared to …

A survey of routing algorithm for mesh Network-on-Chip

Y Wu, C Lu, Y Chen - Frontiers of computer science, 2016 - Springer
With the rapid development of semiconductor industry, the number of cores integrated on
chip increases quickly, which brings tough challenges such as bandwidth, scalability and …

Review, analysis, and implementation of path selection strategies for 2D NoCS

R Singh, MK Bohra, P Hemrajani, A Kalla… - IEEE …, 2022 - ieeexplore.ieee.org
Recent advances in very-large-scale integration (VLSI) technologies have offered the
capability of integrating thousands of processing elements onto a single silicon microchip …

[PDF][PDF] Traffic-aware selection strategy for application-specific 3D NoC

S Azampanah, A Eskandari… - Advances in Computer …, 2013 - academia.edu
Three-dimensional stacking of silicon layers is emerging as a promising solution to handle
the design complexity and heterogeneity of Systems on Chips (SoCs). The use of Networks …

Adaptive look ahead algorithm for 2-D mesh NoC

A Menon, L Zeng, X Jiang… - 2015 IEEE International …, 2015 - ieeexplore.ieee.org
The existing System on Chip (SoC) design will soon become a critical bottle neck in chip
performance with its inability to scale its communication network effectively with decreasing …

[PDF][PDF] Improved extended XY on-chip routing in diametrical 2D MEsh NOC

P Ghosal, TS Das - International Journal of VLSI Design & …, 2012 - researchgate.net
ABSTRACT Network-on-Chip (NoC) is a new approach for designing the communication
subsystem among IP cores in a System-on-Chip (SoC). NoC applies networking theory and …

A performance enhanced adaptive routing algorithm for 3D Network-on-Chips

L Zeng, T Pan, X Jiang… - TENCON 2015-2015 IEEE …, 2015 - ieeexplore.ieee.org
As the technology of semiconductor continues to develop, hundreds of cores will be
deployed on a signal die in the future Chip-Multiprocessors (CMPs) design. So Three …

[PDF][PDF] QoS aware minimally adaptive XY routing for NoC

N Rameshan, A Biyani, M Gaur, V Laxmi… - 17th International …, 2009 - researchgate.net
Network-on-Chip (NoC) has emerged as a solution to communication handling in Systems-
on-Chip design. A major design consideration is high performance of router of smaller size …