System and method for emulating systems with multiple field programmable gate arrays

R Taylor, W Schmidt - US Patent App. 10/439,427, 2004 - Google Patents
A System and method for emulating an ASIC using multiple filed programmable gate arrayS.
A designer, using this method, emulates an integrated circuit design using a pro PO Box …

Scalable reconfigurable prototyping system and method

TB Huang, MR Chene - US Patent 7,353,162, 2008 - Google Patents
The present invention provides a method and a system using a reconfigurable platform for
designing and emulating a user design. The method of the present invention is particularly …

Tileable field-programmable gate array architecture

JC Lien, S Feng, EC Huang, C Sun, T Liu… - US Patent …, 2003 - Google Patents
The present invention relates to field-programmable gate arrays, and more particularly, to an
architecture for tileable field-programmable gate arrayS. 2. Description of the Related Art A …

Method and system for maintaining hierarchy throughout the integrated circuit design process

C Carruthers, I Buchanan - US Patent 6,370,677, 2002 - Google Patents
A method and system for translating abstract structural or behavioral circuit descriptions to
physically implementable files, preferably suitable for use in a Field Programmable Gate …

System and method for designing integrated circuits

M Scurry - US Patent App. 09/778,182, 2002 - Google Patents
0001) 1. Technical Field 0002 The present invention relates generally to systems for
developing integrated circuits, and more particularly to an In-System-Developer and method …

Method and system for maintaining hierarchy throughout the integrated circuit design process

C Carruthers, I Buchanan - US Patent 6,035,106, 2000 - Google Patents
A method and system for translating abstract structural or behavioral circuit descriptions to
physically implementable files, preferably suitable for use in a Field Programmable Gate …

Programmable logic device partitioning method for application specific integrated circuit prototyping

H Yang - US Patent 7,086,025, 2006 - Google Patents
The interconnect pin count between field programmable gate arrays (FPGAS) used in
prototyping an application specific integrated circuit (ASIC) is reduced without compromising …

Method and system for generating a programming bitstream including identification bits

EF Dellinger, R Iwanczuk - US Patent 6,205,574, 2001 - Google Patents
A method and system for generating a programming bitstream for a programmable gate
array. A programming bitstream for the programmable gate array is generated in response to …

Integrated circuit that includes a field-programmable gate array and a hard gate array having the same underlying structure

JC Lien, S Feng, C Sun, EC Huang - US Patent 6,211,697, 2001 - Google Patents
2. Description of the Related Art A field-programmable gate array (FPGA) is an integrated
circuit (IC) that includes a two-dimensional array of general purpose logic circuits, called …

Integrated circuit that includes a field-programmable gate array and a hard gate array having the same underlying structure

JC Lien, S Feng, C Sun, EC Huang - US Patent 6,504,398, 2003 - Google Patents
2. Description of the Related Art A field-programmable gate array (FPGA) is an integrated
circuit (IC) that includes a two-dimensional array of general purpose logic circuits, called …