Automated verification of function block-based industrial control systems

N Völker, BJ Krämer - Science of Computer Programming, 2002 - Elsevier
The international standard IEC 61131-3, which supports Brad Cox'concept of “Software-ICs”
for industrial control programming, is increasingly being used in safety-related application …

SyLVaaS: System level formal verification as a service

T Mancini, F Mari, A Massini, I Melatti… - Fundamenta …, 2016 - content.iospress.com
Abstract The goal of System Level Formal Verification is to show system correctness
notwithstanding uncontrollable events (disturbances), as for example faults, variations in …

Methods for reliable simulation-based PLC code verification

H Carlsson, B Svensson, F Danielsson… - IEEE Transactions …, 2012 - ieeexplore.ieee.org
Simulation-based programmable logic controller (PLC) code verification is a part of virtual
commissioning, where the control code is verified against a virtual prototype of an …

Model-checking based verification approach for advanced industrial automation solutions

M Mazzolini, A Brusaferri… - 2010 IEEE 15th …, 2010 - ieeexplore.ieee.org
Modern automation systems shall be able to conjugate increasing complexity of controlled
processes with agile production reconfiguration requirements. In such a context, structured …

Formal analysis and testing of real-time automotive systems using UPPAAL tools

JH Kim, KG Larsen, B Nielsen, M Mikučionis… - Formal Methods for …, 2015 - Springer
Many safety-concerned standards and regulations for real-time embedded systems, eg, ISO
26262 for automotive electric/electronic systems, recommends the use of formal techniques …

Formal verification of Simulink/Stateflow diagrams

L Zou, N Zhan, S Wang, M Fränzle - … 2015, Shanghai, China, October 12-15 …, 2015 - Springer
Simulink is an industrial de-facto standard for building executable models of control systems
and their environments. Stateflow is a toolbox used to model reactive systems via …

FBDVerifier: Interactive and visual analysis of counter-example in formal verification of function block diagram

E Jee, S Jeon, S Cha, K Koh, J Yoo… - Journal of Research …, 2010 - search.informit.org
Model checking is often applied to verify safety-critical software implemented in
programmable logic controller (PLC) language such as a function block diagram (FBD) …

Verification and optimization of a PLC control schedule

E Brinksma, A Mader, A Fehnker - International Journal on Software Tools …, 2002 - Springer
We report on the use of model checking techniques for both the verification of a process
control program and the derivation of optimal control schedules. Most of this work has been …

[图书][B] Interactive verification of statecharts

A Thums, G Schellhorn, F Ortmeier, W Reif - 2004 - Springer
In this paper, we present an approach to the interactive verification of statecharts. We use
STATEMATE statecharts for the formal specification of safety critical systems and Interval …