A fine-resolution Time-to-Digital Converter for a 5GS/S ADC
KA Townsend, AR Macpherson… - Proceedings of 2010 …, 2010 - ieeexplore.ieee.org
This paper presents the architecture of a high-speed time-based Analog-to-Digital Converter
(ADC) based on voltage-to-time and time-to-digital conversion. A tunable Time-to-Digital …
(ADC) based on voltage-to-time and time-to-digital conversion. A tunable Time-to-Digital …
A 9-bit, 1.08 ps resolution two-step time-to-digital converter in 65 nm CMOS for time-mode ADC
J Kong, S Henzler… - 2016 IEEE Asia Pacific …, 2016 - ieeexplore.ieee.org
This paper presents the design of a 9-bit, Two-Step Time-to-Digital Converter (TDC) in 65
nm CMOS for the application in a time-mode ADC. The proposed TDC uses body-biasing in …
nm CMOS for the application in a time-mode ADC. The proposed TDC uses body-biasing in …
A 1 ps-resolution integrator-based time-to-digital converter using a sar-adc in 90nm cmos
Z Xu, M Miyahara, A Matsuzawa - 2013 IEEE 11th International …, 2013 - ieeexplore.ieee.org
We propose a time-to-digital converter (TDC) that uses a G mC integrator to translate the
time interval into voltage, and quantizes this voltage with a SAR-ADC. The proposed method …
time interval into voltage, and quantizes this voltage with a SAR-ADC. The proposed method …
65-nm CMOS voltage-to-time converter for 5-GS/s time-based ADCs
AR Macpherson, L Belostotski, JW Haslett - Circuits, Systems, and Signal …, 2015 - Springer
This paper discusses a voltage-to-time converter (VTC) designed for use in a time-based
analog-to-digital converter. The VTC considered in this work is based on a starved-inverter …
analog-to-digital converter. The VTC considered in this work is based on a starved-inverter …
A 0.84 ps-LSB 2.47 mW time-to-digital converter using charge pump and SAR-ADC
Z Xu, S Lee, M Miyahara… - Proceedings of the IEEE …, 2013 - ieeexplore.ieee.org
We propose a time-to-digital converter (TDC) using a charge pump and a SAR-ADC. With
this architecture, high time resolution is attainable by increasing the charging current or …
this architecture, high time resolution is attainable by increasing the charging current or …
Time-interleaved single-slope ADC using counter-based time-to-digital converter
In this paper, a time-domain analog-to-digital converter (ADC) using time-to-digital converter
(TDC) is presented. The use of TDC in ADCs is a promising technique for future scaled …
(TDC) is presented. The use of TDC in ADCs is a promising technique for future scaled …
Highly-linear voltage-to-time converter (VTC) circuit for time-based analog-to-digital converters (T-ADCs)
Time-based ADC is an essential block in designing software radio receivers because it
exhibits higher speed and lower power compared to the conventional ADC, especially, at …
exhibits higher speed and lower power compared to the conventional ADC, especially, at …
A 2.5 GS/s 3-bit time-based ADC in 90nm CMOS
AR Macpherson, KA Townsend… - 2011 IEEE International …, 2011 - ieeexplore.ieee.org
This paper describes the first gigasample rate time-based Nyquist analog-to-digital
converter (ADC), consisting of a voltage-to-time-converter (VTC) followed by a time-to-digital …
converter (ADC), consisting of a voltage-to-time-converter (VTC) followed by a time-to-digital …
A low power TDC with 0.5 ps resolution for ADPLL in 40nm CMOS
A low power time-to-digital converter (TDC) with high resolution is presented in this paper.
The TDC employs a digital-to-time converter (DTC) to reduce the dynamic range based on a …
The TDC employs a digital-to-time converter (DTC) to reduce the dynamic range based on a …
A high linear voltage-to-time converter (VTC) with 1.2 V input range for time-domain analog-to-digital converters
This paper presents a high linear voltage-to-time converter (VTC) with wide input range of
over 1.2 V pp, diff for the high-speed high-linear time-domain (TD) analog-to-digital …
over 1.2 V pp, diff for the high-speed high-linear time-domain (TD) analog-to-digital …