Neural network processor with direct memory access and hardware acceleration circuits
JR Goulding, JE Mixter, DR Mucha - US Patent 10,872,290, 2020 - Google Patents
(57) ABSTRACT A dynamically adaptive neural network processing system includes
memory to store instructions representing a neural network in contiguous blocks, hardware …
memory to store instructions representing a neural network in contiguous blocks, hardware …
Neural network processor
J Ross, NP Jouppi, AE Phelps, RC Young… - US Patent …, 2017 - Google Patents
(57) ABSTRACT A circuit for performing neural network computations for a neural network
comprising a plurality of neural network layers, the circuit comprising: a matrix computation …
comprising a plurality of neural network layers, the circuit comprising: a matrix computation …
Neural network processor
J Ross, NP Jouppi, AE Phelps, RC Young… - US Patent …, 2017 - Google Patents
A circuit for performing neural network computations for a neural network comprising a
plurality of neural network layers, the circuit comprising: a matrix computation unit configured …
plurality of neural network layers, the circuit comprising: a matrix computation unit configured …
Neural network processor
J Ross, NP Jouppi, AE Phelps, RC Young… - US Patent …, 2020 - Google Patents
A circuit for performing neural network computations for a neural network comprising a
plurality of neural network layers, the circuit comprising: a matrix computation unit configured …
plurality of neural network layers, the circuit comprising: a matrix computation unit configured …
Neural network processor
H Kim, B Gu, J Kang, LEE Changman - US Patent 10,698,730, 2020 - Google Patents
A processing unit for neural network processing includes: an instruction memory that stores
tasks including one or more instructions; a data memory that stores data related to the tasks; …
tasks including one or more instructions; a data memory that stores data related to the tasks; …
Neural network unit with output buffer feedback for performing recurrent neural network computations
GG Henry, T Parks, KT O'brien - US Patent 10,552,370, 2020 - Google Patents
2016-08-01 Assigned to VIA ALLIANCE SEMICONDUCTOR CO., LTD. reassignment VIA
ALLIANCE SEMICONDUCTOR CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE …
ALLIANCE SEMICONDUCTOR CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE …
Vector computation unit in a neural network processor
GM Thorson, CA Clark, D Luu - US Patent 10,074,051, 2018 - Google Patents
A circuit for performing neural network computations for a neural network comprising a
plurality of layers, the circuit comprising: activation circuitry configured to receive a vector of …
plurality of layers, the circuit comprising: activation circuitry configured to receive a vector of …
Neural network processor using compression and decompression of activation data to reduce memory bandwidth utilization
JL Corkery, BE Lundell, LM Wall, CB McBRIDE… - US Patent …, 2022 - Google Patents
(57) ABSTRACT A deep neural network (“DNN”) module compresses and decompresses
neuron-generated activation data to reduce the utilization of memory bus bandwidth. The …
neuron-generated activation data to reduce the utilization of memory bus bandwidth. The …
Neural network system and operating method of neural network system
SS Yang - US Patent App. 16/039,730, 2019 - Google Patents
A neural network system is configured to perform a parallel processing operation. The
neural network system includes a first processor configured to generate a plurality of first …
neural network system includes a first processor configured to generate a plurality of first …
Neural network processor configurable using macro instructions
JW Brothers, J Lee - US Patent 11,244,225, 2022 - Google Patents
Implementing a neural network can include receiving a macro instruction for implementing
the neural network within a control unit of a neural network processor. The macro instruction …
the neural network within a control unit of a neural network processor. The macro instruction …