Noise and isolation play a crucial role in the design and integration of telecommunications
circuits. This work explores noise considerations for integrated design, including NPN and …

This thesis presents an automated methodology to calibrate the substrate profile for accurate
prediction of substrate parasitics using Green's function based extractors. The technique …

A new figure of merit, intrinsic factor for interconnects, is proposed to provide insights as to
how back-end metallization influences the performance of radio frequency integrated …

Substrate noise in integrated circuits is a major impediment to mixed-signal integration.
Accurate simulation is therefore, needed to investigate the generation, propagation, and …

Issues related to substrate noise in system-on-chip design are described including the
physical phenomena responsible for its creation, coupling transmission mechanisms and …

In this work an enhanced approach to 3D process modeling using mixed element meshes
followed by tetrahedralization and small signal device simulation by Fielday is presented …

Substrate-coupling equivalent circuits can be derived for arbitrary isolation structures by F-
matrix computation. The derived netlist represents a unified impedance network among …

This article discusses a set of design guidelines to reduce the on-chip substrate noise
coupling in RF and mixed signal applications. Measurement data is presented to compare …

Substrate noise problems in a system-on-a-chip hamper the smooth cohabitation between
analog and digital circuitries on the same die. Solving those problems will shorten the time …

This paper investigates SiGe profile design tradeoffs for low-noise RF applications at a given
technology generation (ie, fixed minimum feature size and thermal cycle). An intuitive model …