The single event transients (SETs) are a common source of malfunction in nano-scale
CMOS integrated circuits. For this reason, evaluation of the SET effects and application of …

This paper reviews the status of research in modeling and simulation of single-event effects
(SEE) in digital devices and integrated circuits. After introducing a brief historical overview of …

This work presents the modeling of the impact of elevated temperatures on the SET
occurrence and their characteristics in an IBM 65-nm Bulk CMOS technology. The …

A new analytical modelling approach to evaluate the impact of single event transients
(SETs) on CMOS circuits has been developed. The model allows evaluation of transient …

An accurate and computer efficient analytical model for the evaluation of integrated circuit
sensitivity to radiation induced single event transients is presented. The key idea of the work …

The ability for Single Event Transients (SETs) to induce soft errors in Integrated Circuits (ICs)
was predicted for the first time by Wallmark and Marcus in the early 60's and was confirmed …

The generation and the propagation of radiation induced single event transients (SET) in
CMOS circuits are evaluated. An accurate and computer efficient analytical model for SET …

With decreasing feature size, analysis of circuits for radiation strike vulnerability is becoming
very important in a many applications. Classical modeling methods may be not sufficient to …

This paper presents a tool based on a two dimensional charge-collection simulation to study
non-destructive single event effects in CMOS IC blocks. The interaction between the …

This paper presents an efficient and accurate numerical analysis technique to simulate
single event upsets (SEUs) in logic circuits. Experimental results that show the method is …