World's fastest FFT architectures: Breaking the barrier of 100 GS/s

M Garrido, K Möller, M Kumm - IEEE Transactions on Circuits …, 2018 - ieeexplore.ieee.org
This paper presents the fastest fast Fourier transform (FFT) hardware architectures so far.
The architectures are based on a fully parallel implementation of the FFT algorithm. In order …

The serial commutator FFT

M Garrido, SJ Huang, SG Chen… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
This brief presents a new type of fast Fourier transform (FFT) hardware architectures called
serial commutator (SC) FFT. The SC FFT is characterized by the use of circuits for bit …

Hardware architectures for the fast Fourier transform

M Garrido, F Qureshi, J Takala… - Handbook of signal …, 2019 - Springer
The fast Fourier transform (FFT) is a widely used algorithm in signal processing applications.
FFT hardware architectures are designed to meet the requirements of the most demanding …

The constant multiplier FFT

M Garrido, P Malagón - … Transactions on Circuits and Systems I …, 2020 - ieeexplore.ieee.org
In this paper, we present a new fast Fourier transform (FFT) hardware architecture called
constant multiplier (CM) FFT. Whereas rotators in previous architectures must rotate among …

Design, optimization, and implementation of a universal FFT processor

P Kumhom, JR Johnson… - Proceedings of 13th …, 2000 - ieeexplore.ieee.org
There exist Fast Fourier transform (FFT) algorithms, called dimensionless FFTs, that work
independent of dimension. These algorithms can be configured to compute different …

A novel architecture of area efficient FFT algorithm for FPGA implementation

A Mukherjee, A Sinha, D Choudhury - ACM SIGARCH Computer …, 2016 - dl.acm.org
Fast Fourier transform (FFT) of large number of samples requires huge hardware resources
of field programmable gate arrays (FPGA), which needs more area and power. In this paper …

COBRA: A 100-MOPS single-chip programmable and expandable FFT

T Chen, G Sunada, J Jin - … on very large scale integration (vlsi) …, 1999 - ieeexplore.ieee.org
This paper presents an optimized column fast Fourier transform (FFT) architecture, which
utilizes bit-serial arithmetic and dynamic reconfiguration to achieve a complete overlap …

Area efficient floating‐point FFT butterfly architectures based on multi‐operand adders

A Kaivani, SB Ko - Electronics Letters, 2015 - Wiley Online Library
Hardware implementation of the fast Fourier transform (FFT) function consists of multiple
consecutive arithmetic operations over complex numbers. Applying floating‐point arithmetic …

[PDF][PDF] The fast fourier transform in hardware: A tutorial based on an FPGA implementation

GW Slade - Mar, 2013 - researchgate.net
In digital signal processing (DSP), the fast fourier transform (FFT) is one of the most
fundamental and useful system building block available to the designer. Whereas the …

A novel low-power and in-place split-radix FFT processor

Z Qian, M Margala - Proceedings of the 24th edition of the great lakes …, 2014 - dl.acm.org
Split-radix Fast Fourier Transform (SRFFT) approximates the minimum number of
multiplications by theory among all the FFT algorithms. Since multiplications significantly …