Because of its high storage density with superior scalability, low integration cost and
reasonably high access speed, spin-torque transfer random access memory (STT RAM) …

The advent of many core architectures has coincided with the energy and power limited
design of modern processors. Projections for main memory clearly show widening of the …

Spin-transfer torque RAM (STT-RAM) has emerged as an energy-efficient and high-density
alternative to SRAM for large on-chip caches. However, its high write energy has been …

Modern high performance Chip Multiprocessor (CMP) systems rely on large on-chip cache
hierarchy. As technology scales down, the leakage power of present SRAM based cache …

As the speed gap of the modern processor and the off-chip main memory enlarges, on-chip
cache capacity increases to sustain the performance scaling. As a result, the cache power …

Energy becomes an inevitable challenge when using a large die-stacking dynamic random
access memory (DRAM) cache. Although emerging spin-transfer-torque-RAM (STT-RAM) …

Spin-transfer torque random access memory (STT-RAM) is the most promising candidate to
be universal memory due to its good scalability, zero standby power, and radiation …

Hybrid caches consisting of static RAM (SRAM) and spin-torque transfer (STT)-RAM have
been proposed recently for energy efficiency. To explore the advantages of hybrid cache …

In this chapter, we introduce how to adopt spin-transfer torque random access memory (STT-
RAM) as on-chip L2 caches to achieve better performance and lower energy consumption …

It has been predicted that a processor's caches could occupy as much as 90% of chip area a
few technology nodes from the current ones. In this article, we investigate the use of …