The present invention is a direct digitally implemented network system in which neural
nodes 24, 26 and 28 which output to the same destination node 22 in the network share the …

The present invention is a direct digitally implemented network system in which neural
nodes 24, 26 and 28 which output to the same destination node 22 in the network share the …

A circuit for implementing a neural network comprises a one dimensional systolic array of
processing elements controlled by a microprocessor. The one dimensional systolic array …

57 ABSTRACT A neural network IC 31 includes n dedicated processing elements (PEs) 62,
an output register 66 for storing the PEs' outputs So that they are immediately accessible to …

Data processing system implementing architecture of a neural network which is subject to a
learning process, wherein the data processing system includes nXn syn apses arranged in …

In a neural network, input neuron units of an input layer are grouped into first through J-th
input layer frames, where J represents a predetermined natural number. Intermediate …

[57] ABSTRACT A digital computer architecture speci? cally tailored for implementing a
neural network. Several simultaneously operable processors (10) each have their own local …

An artificial neural network is provided using a digital architecture having feedforward and
feedback proces sors interconnected with a digital computation ring or data bus to handle …

According to a first aspect of the invention, a pipelined hardware implementation of a neural
network circuit is provided. The inventive neural network circuit includes an input Stage for …

SUMMARY OF INVENTION The problem, therefore, is to realize an arrangement of the type
described above which is fast and which can be integrated in a compact manner. The …