Cache-coherent shared-memory multiprocessors have wide-ranging applications, from
commercial transaction processing and database services to large-scale scientific …

Designing massive scale cache coherence systems has been an elusive goal. Whether it be
on large-scale GPUs, future thousand-core chips, or across million-core warehouse scale …

Scalable cache coherence solutions are imperative to drive the many-core revolution
forward. To fully realize the massive computation power of these many-core architectures …

To maintain coherence in conventional shared-memory multiprocessor systems, processors
first check other processors' caches before obtaining data from memory. This coherence …

Due to data spreading among processors and due to the cache coherence problem, private
data caches have not been as effective in reducing the average memory delay in …

The cache coherence mechanisms are a key component towards achieving the goal of
continuing exponential performance growth through widespread thread-level parallelism …

Large-scale CMPs with hundreds of cores require a directory-based protocol to maintain
cache coherence. However, previously proposed coherence directories are hard to scale …

In this paper, we study a hardware-supported, compiler directed (HSCD) cache coherence
scheme, which can be implemented on a large-scale multiprocessor using off-the-shelf …

In this paper, we evaluate a set of coherence architectures in the context of a 1024-core chip
multiprocessor (CMP) tailored to throughput-oriented parallel workloads. Based on our …

This work proposes a mechanism to hybridize the benefits of snoop-based and directory-
based coherence protocols in a single construct. A non-inclusive sparse-directory is used to …