57 ABSTRACT A neural network IC 31 includes n dedicated processing elements (PEs) 62,
an output register 66 for storing the PEs' outputs So that they are immediately accessible to …

According to a first aspect of the invention, a pipelined hardware implementation of a neural
network circuit is provided. The inventive neural network circuit includes an input Stage for …

(57) ABSTRACT A novel and useful neural network (NN) processing core adapted to
implement artificial neural networks (ANNs) and incorporating processing circuits having …

The neural semiconductor chip first includes: a global register and control logic circuit block,
a R/W memory block and a plurality of neurons fed by buses transporting data such as the …

The neural engine (20) is a hardware implementation of a neural network for use in real-time
systems. The neural engine (20) includes a control circuit (26) and one or more …

The present invention is a direct digitally implemented network system in which neural
nodes 24, 26 and 28 which output to the same destination node 22 in the network share the …

the present invention relates to a neural processing element for use in a neural network
(NN). Particularly, but not exclusively, the invention relates to a scalable implementation of a …

A circuit for implementing a neural network comprises a one dimensional systolic array of
processing elements controlled by a microprocessor. The one dimensional systolic array …

[57] ABSTRACT A base neural semiconductor chip (10) including a neural network or unit
(11 (*)). The neural network (11 (*)) has a plurality of neuron circuits fed by different buses …

An array of N processing units (PU) each has: an accumulator; an arithmetic unit performs
an operation on first, second and third inputs to generate a result to store in the accumulator …