Time-interleaved single-slope ADC using counter-based time-to-digital converter
In this paper, a time-domain analog-to-digital converter (ADC) using time-to-digital converter
(TDC) is presented. The use of TDC in ADCs is a promising technique for future scaled …
(TDC) is presented. The use of TDC in ADCs is a promising technique for future scaled …
Highly-linear voltage-to-time converter (VTC) circuit for time-based analog-to-digital converters (T-ADCs)
Time-based ADC is an essential block in designing software radio receivers because it
exhibits higher speed and lower power compared to the conventional ADC, especially, at …
exhibits higher speed and lower power compared to the conventional ADC, especially, at …
A fine-resolution Time-to-Digital Converter for a 5GS/S ADC
KA Townsend, AR Macpherson… - Proceedings of 2010 …, 2010 - ieeexplore.ieee.org
This paper presents the architecture of a high-speed time-based Analog-to-Digital Converter
(ADC) based on voltage-to-time and time-to-digital conversion. A tunable Time-to-Digital …
(ADC) based on voltage-to-time and time-to-digital conversion. A tunable Time-to-Digital …
A 12-bit 3.4 MS/s Two-Step Cyclic Time-Domain ADC in 0.18- CMOS
LJ Chen, SI Liu - IEEE Transactions on Very Large Scale …, 2015 - ieeexplore.ieee.org
Two two-step cyclic time-domain analog-to-digital converters (TADCs) in a 0.18-μm CMOS
process are presented. The proposed TADC uses a voltage-to-time converter (VTC) with a …
process are presented. The proposed TADC uses a voltage-to-time converter (VTC) with a …
A 1 ps-resolution integrator-based time-to-digital converter using a sar-adc in 90nm cmos
Z Xu, M Miyahara, A Matsuzawa - 2013 IEEE 11th International …, 2013 - ieeexplore.ieee.org
We propose a time-to-digital converter (TDC) that uses a G mC integrator to translate the
time interval into voltage, and quantizes this voltage with a SAR-ADC. The proposed method …
time interval into voltage, and quantizes this voltage with a SAR-ADC. The proposed method …
A 10-bit 2.5-GS/s two-step ADC with selective time-domain quantization in 28-nm CMOS
In this paper, a single-channel two-step voltage-time hybrid domain analog-to-digital
converter (ADC) is proposed. To achieve high sampling rate and high accuracy, 3.5-bit …
converter (ADC) is proposed. To achieve high sampling rate and high accuracy, 3.5-bit …
A 9-bit, 1.08 ps resolution two-step time-to-digital converter in 65 nm CMOS for time-mode ADC
J Kong, S Henzler… - 2016 IEEE Asia Pacific …, 2016 - ieeexplore.ieee.org
This paper presents the design of a 9-bit, Two-Step Time-to-Digital Converter (TDC) in 65
nm CMOS for the application in a time-mode ADC. The proposed TDC uses body-biasing in …
nm CMOS for the application in a time-mode ADC. The proposed TDC uses body-biasing in …
A new design methodology for voltage-to-time converters (VTCs) circuits suitable for time-based analog-to-digital converters (T-ADC)
Voltage-to-Time Converter (VTC) circuit is considered one of the essential blocks in the
design of Time-based Analog-to-Digital Converters (T-ADCs). T-ADC is a promising …
design of Time-based Analog-to-Digital Converters (T-ADCs). T-ADC is a promising …
A time-based bandpass ADC using time-interleaved voltage-controlled oscillators
In this paper, a bandpass analog-to-digital converter (ADC) based on time-interleaved
oversampled ADC is introduced. Unlike previous delta-sigma bandpass ADCs that require …
oversampled ADC is introduced. Unlike previous delta-sigma bandpass ADCs that require …
[PDF][PDF] Design and Implementation of an Analog-to-Time-to-Digital converter
JDA van den Broek - … and Computer Science, University of Twente …, 2012 - essay.utwente.nl
This thesis describes the design and implementation of an analog-to-digital converter (ADC)
taking an uncommon two-step approach: a voltage-to-time converter (VTC) converts the …
taking an uncommon two-step approach: a voltage-to-time converter (VTC) converts the …