Conductive pad structure for hybrid bonding and methods of forming same

SC Chen, SP Chou, YC Chu, CH Chou… - US Patent …, 2016 - Google Patents
BACKGROUND Typically, in a semiconductor device, various electronic components (eg,
transistors, diodes, resistors, capacitors, and the like) are formed in device dies on a wafer …

Interconnect structures

CE Uzoh, GG Fountain Jr, JA Theil - US Patent 11,158,573, 2021 - Google Patents
Representative techniques and devices, including process steps may be employed to
mitigate undesired dishing in conductive interconnect structures and erosion of dielectric …

Package-free bonding pad structure

MC Hsuan, FT Liou - US Patent 6,031,293, 2000 - Google Patents
The present invention is to provide a package-free bond ing pad structure capable of directly
coupling to a carrier or a base Substrate without having to go through a third conductive …

Integrated circuit bonding pads including conductive layers with arrays of unaligned spaced apart insulating islands therein and methods of forming same

SC Lee, JH Ahn, K Son, H Shin, H Lee, Y Kim… - US Patent …, 2003 - Google Patents
Bonding pads for integrated circuits include first and Second spaced apart conductive
layers, a third continuous conduc tive layer between the first and Second Spaced apart and …

Composite bump structures

SM Chang, YC Lee, J Jou - US Patent 6,084,301, 2000 - Google Patents
A composite bump structure and methods of forming the composite bump structure. The
composite bump structure comprises a polymer body of relatively low Young's Modulus …

Room temperature metal direct bonding

QY Tong, PM Enquist, AS Rose - US Patent 9,385,024, 2016 - Google Patents
(57) ABSTRACT A bonded device structure including a first Substrate having a first set of
metallic bonding pads, preferably connected to a device or circuit, and having a first non …

Integrated circuit bonding pads including closed vias and closed conductive patterns

H Lee - US Patent 6,222,270, 2001 - Google Patents
Multilayer bonding pads for integrated circuits include first and second spaced apart
conductive patterns and a dielectric layer therebetween. A closed conductive pattern is …

Room temperature metal direct bonding

QY Tong, PM Enquist, AS Rose - US Patent 7,602,070, 2009 - Google Patents
A bonded device structure including a first substrate having a first set of metallic bonding
pads, preferably connected to a device or circuit, and having a first non-metallic region …

Stacked devices and methods of fabrication

PM Enquist, B Haba - US Patent 11,276,676, 2022 - Google Patents
Stacked devices and methods of fabrication are provided. Die-to-wafer (D2W) direct-
bonding techniques join layers of dies of various physical sizes, form factors, and foundry …

Room temperature metal direct bonding

QY Tong, PM Enquist, AS Rose - US Patent 7,842,540, 2010 - Google Patents
(57) ABSTRACT A bonded device structure including a first Substrate having a first set of
metallic bonding pads, preferably connected to a device or circuit, and having a first non …