A High-Efficiency Isolated PFC AC–DC Topology with Reduced Number of Semiconductor Devices

O Aldosari, LAG Rodriguez, GG Oggier… - IEEE Journal of …, 2021 - ieeexplore.ieee.org
A new three-level isolated ac–dc power factor correction (PFC) topology with a minimum
number of semiconductor devices is the focus of this article. This topology provides a high …

A High-Efficiency Isolated PFC AC-DC Topology with Reduced Number of Semiconductor Devices

O Aldosari, LG Rodriguez, GG Oggier… - IEEE Journal of Emerging …, 2021 - osti.gov
A new three-level isolated ac-dc power factor correction (PFC) topology with a minimum
number of semiconductor devices is the focus of this paper. This topology provides a high …

A high-efficiency isolated PFC AC-DC topology with reduced number of semiconductor devices

O Aldosari, LAG Rodriguez, GG Oggier, JC Balda - 2022 - ri.conicet.gov.ar
A new three-level isolated ac-dc power factor correction (PFC) topology with a minimum
number of semiconductor devices is the focus of this article. This topology provides a high …

A high-efficiency isolated PFC AC-DC topology with reduced number of semiconductor devices

O Aldosari, LAG Rodriguez, GG Oggier… - 2022 - notablesdelaciencia.conicet.gov.ar
A new three-level isolated ac-dc power factor correction (PFC) topology with a minimum
number of semiconductor devices is the focus of this article. This topology provides a high …

A high-efficiency isolated PFC AC-DC topology with reduced number of semiconductor devices

O Aldosari, LAG Rodriguez, GG Oggier… - 2022 - datosdeinvestigacion.conicet.gov.ar
A new three-level isolated ac-dc power factor correction (PFC) topology with a minimum
number of semiconductor devices is the focus of this article. This topology provides a high …