Evolution of chip-scale heterodyne optical phase-locked loops toward Watt level power consumption

A Simsek, S Arafin, SK Kim, GB Morrison… - Journal of Lightwave …, 2017 - ieeexplore.ieee.org
We design and experimentally demonstrate two chip-scale and agile heterodyne optical
phase-locked loops (OPLLs) based on two types of InP-based photonic-integrated coherent …

[PDF][PDF] Evolution of Chip-Scale Heterodyne Optical Phase-Locked Loops towards Watt Level Power Consumption

A Simsek, S Arafin, SK Kim, G Morrison, LA Johansson… - laser - researchgate.net
We design and experimentally demonstrate two chip-scale and agile heterodyne optical
phase-locked loops (OPLLs) based on two types of InP-based photonic integrated coherent …

[PDF][PDF] Evolution of Chip-Scale Heterodyne Optical Phase-Locked Loops Toward Watt Level Power Consumption

A Simsek, S Arafin, SK Kim, GB Morrison… - JOURNAL OF …, 2018 - u.osu.edu
We design and experimentally demonstrate two chip-scale and agile heterodyne optical
phase-locked loops (OPLLs) based on two types of InP-based photonic-integrated coherent …

[PDF][PDF] Evolution of Chip-Scale Heterodyne Optical Phase-Locked Loops towards Watt Level Power Consumption

A Simsek, S Arafin, SK Kim, G Morrison, LA Johansson… - laser - ieeexplore.ieee.org
We design and experimentally demonstrate two chip-scale and agile heterodyne optical
phase-locked loops (OPLLs) based on two types of InP-based photonic integrated coherent …

[PDF][PDF] Evolution of Chip-Scale Heterodyne Optical Phase-Locked Loops Toward Watt Level Power Consumption

A Simsek, S Arafin, SK Kim… - JOURNAL OF …, 2018 - coldren.ece.ucsb.edu
We design and experimentally demonstrate two chip-scale and agile heterodyne optical
phase-locked loops (OPLLs) based on two types of InP-based photonic-integrated coherent …

Evolution of Chip-Scale Heterodyne Optical Phase-Locked Loops Toward Watt Level Power Consumption

A Simsek, S Arafin, SK Kim, GB Morrison… - Journal of Lightwave …, 2018 - opg.optica.org
We design and experimentally demonstrate two chip-scale and agile heterodyne optical
phase-locked loops (OPLLs) based on two types of InP-based photonic-integrated coherent …

[引用][C] Evolution of Chip-Scale Heterodyne Optical Phase-Locked Loops Toward Watt Level Power Consumption

A Simsek, S Arafin, SK Kim, GB Morrison… - Journal of Lightwave …, 2018 - cir.nii.ac.jp
Evolution of Chip-Scale Heterodyne Optical Phase-Locked Loops Toward Watt Level Power
Consumption | CiNii Research CiNii 国立情報学研究所 学術情報ナビゲータ[サイニィ] 詳細へ移動 …

[PDF][PDF] Evolution of Chip-Scale Heterodyne Optical Phase-Locked Loops Toward Watt Level Power Consumption

A Simsek, S Arafin, SK Kim, GB Morrison… - JOURNAL OF …, 2018 - ece.ucsb.edu
We design and experimentally demonstrate two chip-scale and agile heterodyne optical
phase-locked loops (OPLLs) based on two types of InP-based photonic-integrated coherent …

[PDF][PDF] Evolution of Chip-Scale Heterodyne Optical Phase-Locked Loops towards Watt Level Power Consumption

A Simsek, S Arafin, SK Kim, G Morrison, LA Johansson… - laser - academia.edu
We design and experimentally demonstrate two chip-scale and agile heterodyne optical
phase-locked loops (OPLLs) based on two types of InP-based photonic integrated coherent …

Evolution of Chip-Scale Heterodyne Optical Phase-Locked Loops Toward Watt Level Power Consumption

A Simsek, S Arafin, SK Kim… - Journal of …, 2018 - ohiostate.elsevierpure.com
We design and experimentally demonstrate two chip-scale and agile heterodyne optical
phase-locked loops (OPLLs) based on two types of InP-based photonic-integrated coherent …