described. The digital modulator is pipelined to minimize both its power dissipation and
design complexity. The 6-bit output of this modulator is converted to analog using 64 current-
steering cells that are continuously calibrated to a reference current. This converter achieves
85-dB dynamic range at 5-MHz signal bandwidth, with an oversampling ratio of 12. The chip
was fabricated in a 0.5-/spl mu/m CMOS technology and operates from a single 2.5-V …