A series of inductor loads may not be the best design criterion for improvement in circuit performance.  In this work, the best compromise so far for the trade-off in power consumption, input referred noise current spectral density, with wide bandwidth, high transimpedance gain and low DC supply voltage is reported. A simulated 65 nm CMOS feedforward transimpedance amplifier is introduced with a series of single PMOS loads instead of a series of inductor loads. A bandwidth of 20.16 GHz with a transimpedance gain of 51.16 dBΩ, an input referred noise current spectral density of 34.3 p A⁄√Hz, a power consumption of 1.052 mW and with a 1V DC supply voltage are presented. In addition, an active inductor load (instead of inductor load) is introduced within the 65 nm CMOS feedforward transimpedance amplifier. A bandwidth of 3.75 GHz with a transimpedance gain of 42.7 dBΩ, an input referred noise current spectral density of 21.4 p A⁄√Hz, a power consumption of 0.66 mW and with a 1V DC supply voltage are reported. This 65 nm CMOS feedforward design process provides enough voltage headrom for gate-to-source terminals in amplifying transistors due to less DC voltage drop across PMOS loads. As a result, this design process consumes the lowest possible power consumption especially with the single PMOS loads as well as with the active inductor load.