A dither-less all digital PLL for cellular transmitters

L Vercesi, L Fanori, F De Bernardinis… - IEEE Journal of Solid …, 2012 - ieeexplore.ieee.org
L Vercesi, L Fanori, F De Bernardinis, A Liscidini, R Castello
IEEE Journal of Solid-State Circuits, 2012ieeexplore.ieee.org
An all-digital frequency synthesizer for cellular transmitter is presented. Low phase-noise is
achieved both in-band and out-of-band exploiting a 2-dimensional Vernier time-to-digital
converter and a dither-less digitally controlled oscillator. These building blocks heavily rely
on digital calibration techniques to precisely and efficiently implement two-point modulation
and spur cancellation in the presence of implementation impairments. The presented
prototype shows an in-band phase noise of - 108 dBc/Hz, an out-of-band phase noise of …
An all-digital frequency synthesizer for cellular transmitter is presented. Low phase-noise is achieved both in-band and out-of-band exploiting a 2-dimensional Vernier time-to-digital converter and a dither-less digitally controlled oscillator. These building blocks heavily rely on digital calibration techniques to precisely and efficiently implement two-point modulation and spur cancellation in the presence of implementation impairments. The presented prototype shows an in-band phase noise of 108 dBc/Hz, an out-of-band phase noise of 160 dBc/Hz @20 MHz and in-band fractional spurs below 50 dBc. These results are obtained for an output carrier of 1.8 GHz, a reference clock of 26 MHz, with a power consumption of 41.6 mW.
ieeexplore.ieee.org
以上显示的是最相近的搜索结果。 查看全部搜索结果