Multi-core programming is no more a luxury; it is now a necessity, because even embedded processors are becoming multi-core. However, the state-of-the-art techniques such as OpenMP and the Intel Threading Building Block (TBB) library are far from user-friendly due to the tedious work needed in explicitly designing multi-core programs and debugging. At the present days, a solution for above problems will be that to enhance the abstract level of multicore embedded software design. By leveraging on the expertise gained from Verifiable Embedded Real-Time Application Framework (VERTAF), we propose a Multi-Core version of VERTAF, called VERTAF/ Multi-core (VMC in short). VMC is an integrated development environment for multi-core embedded software architecture. Developers would be able to 1. describe their system requirements with SysML by using this environment, 2. model their design with SysML standard notation, 3. automatically apply a pattern structure into their design for a high quality multicore embedded system, 4. generate source code through a well-designed model; 5. map to different hardware architecture as assigned by the model, and 6. finally we can test the code.Using the model driven architecture (MDA) design flow in SysML, we saw a significantly improvement on productivity and quality of a multicore embedded programming over traditional approach.