This paper presents MORA, a new coarse-grain reconfigurable architecture optimized for multimedia processing. The system has been designed to provide a dense support for arithmetic operations, wide internal data bandwidth and efficiently distributed memory resources. All these characteristics are combined in a cohesive structure to efficiently support a block-level pipelined dataflow, which is particularly suitable for stream-oriented applications. Moreover, the new reconfigurable architecture is highly flexible and easily scalable. MORA (multimedia oriented reconfigurable array) has drastically improved performance- and area- efficiency compared to the state of the art FPGA, DSP and other reconfigurable systems in executing multimedia-oriented applications. In computing 8times8 2D DCT, MORA delivers orders of magnitude times higher throughput efficiency compared to Morphosys, Virtex-4 or TMS320DM642-720 DSP architectures.