19.4 A 0.17-to-3.5 mW 0.15-to-5GHz SoC PLL with 15dB built-in supply noise rejection and self-bandwidth control in 14nm CMOS

KYJ Shen, SFS Farooq, Y Fan… - … Solid-State Circuits …, 2016 - ieeexplore.ieee.org
… delivers IREF to both CPs, a switchedcapacitor loop filter, a 5-… the current through a pair of
switched-cap resistors clocked at … the capacitor switching frequency and the value of switched

A self-bandwidth switching & area-efficient PLL using multiplexer-controlled frequency selector

BD Kumar, S Pandey, P Arora… - 2017 7th International …, 2017 - ieeexplore.ieee.org
… -efficient and low power PLL design with self-bandwidth switching capability. The capacitor-array
in … The architecture can be used for versatile applications and fast frequency switching

A flexible, low-power analog PLL for SoC and processors in 14nm CMOS

KY Shen, SFS Farooq, Y Fan… - … on Circuits and …, 2018 - ieeexplore.ieee.org
… Fabricated in 14nm FinFET CMOS, a low-power switched-cap … Bandwidth is extended
via a switched-capacitor loop filter … Section II describes the PLL architecture and self-bandwidth

A 10 MHz to 3.2 GHz Differential Current Starved Inverter-Based Self-Biased Adaptive Bandwidth PLL in 65nm CMOS

J Koo, L Theogarajan - 2024 IEEE 67th International Midwest …, 2024 - ieeexplore.ieee.org
… -control voltage relationship is achieved by adaptively moving the switching threshold. … to
ensure differential operation and forces the switching point of the inverter to be proportional to …

A Fast-Lock Low-Jitter PLL Based Adaptive Bandwidth Technique

Y Liu, S Yue, X Han, J Liu - Journal of Physics: Conference …, 2018 - iopscience.iop.org
switch of CP after voltage conversion, the other one branch convey to VI module to control the
switch of … rejection and self-bandwidth control in 14 nm CMOS 2016 ISSCC Dig. Tech. 330. …

A noise reconfigurable all-digital phase-locked loop using a switched capacitor-based frequency-locked loop and a noise detector

T Jang, S Jeong, D Jeon, KD Choo… - IEEE Journal of Solid …, 2017 - ieeexplore.ieee.org
… To analyze the feedback path of the proposed topology, we first need to analyze the transfer
function of the switched capacitor. fout serves as an input to the switched capacitor, and its …

Why have bandwidth trading markets not matured? Analysis of technological and market issues

P Ferreira, J Mindel, L McKnight - International Journal of …, 2003 - inderscienceonline.com
… We call this situation ‘to-selfbandwidth trading because the traffic leaves ASx and returns
… agreement, it becomes label switched and follows a label switched path, within the other AS, …

[PDF][PDF] Why Bandwidth Trading Markets Have not Matured? Analysis of Technological and Market Issues

P Ferreira, J Mindel, L McKnight - International Journal of …, 2004 - researchgate.net
… We call this situation “to-selfbandwidth trading because the traffic leaves ASx and returns
… agreement, it becomes label switched and follows a label switched path, within the other AS, …

A 0.9–2.25-GHz sub-0.2-mW/GHz compact low-voltage low-power hybrid digital PLL with loop bandwidth-tracking technique

Z Zhang, J Yang, L Liu, P Feng, J Liu… - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
This paper proposes a low-voltage low-power hybrid digital phase-locked loop (LVHDPLL).
It adopts a loop bandwidth-tracking technique to keep the loop bandwidth almost constant in …

A low-jitter and low-reference-spur ring-VCO-based switched-loop filter PLL using a fast phase-error correction technique

Y Lee, T Seong, S Yoo, J Choi - IEEE Journal of Solid-State …, 2017 - ieeexplore.ieee.org
… of SWP and SWI , respectively, were generated by the switchtiming controller to … , the switch
to initialize charges in CP, ie, SWR in Fig. 4(a), was implemented using an NMOS switch of …