A symbolic pole/zero extraction methodology based on analysis of circuit time-constants
O Guerra, JD Rodriguez-Garcia, FV Fernandez… - … Integrated Circuits and …, 2002 - Springer
Analog Integrated Circuits and Signal Processing, 2002•Springer
This paper introduces a methodology for symbolic pole/zero extraction based on the
formulation of the time-constant matrix of the circuits. This methodology incorporates
approximation techniques specifically devoted to achieve an optimum trade-off between
accuracy and complexity of the symbolic root expressions. The capability to efficiently
handle even large circuits will be demonstrated through several practical circuits.
formulation of the time-constant matrix of the circuits. This methodology incorporates
approximation techniques specifically devoted to achieve an optimum trade-off between
accuracy and complexity of the symbolic root expressions. The capability to efficiently
handle even large circuits will be demonstrated through several practical circuits.
Abstract
This paper introduces a methodology for symbolic pole/zero extraction based on the formulation of the time-constant matrix of the circuits. This methodology incorporates approximation techniques specifically devoted to achieve an optimum trade-off between accuracy and complexity of the symbolic root expressions. The capability to efficiently handle even large circuits will be demonstrated through several practical circuits.
Springer
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