Design of a low power analog and multi-shaped fully programmable twin-cell membership function generator circuit in 65 nm CMOS technology

H Ghasemian, S Karami, E Abiri, MR Salehi - Circuits, Systems, and Signal …, 2021 - Springer
Circuits, Systems, and Signal Processing, 2021Springer
This paper presents a new approach for implementing an analog fully programmable
membership function generator (MFG) with twin-cell topology which can operate in
Transconductance-mode. The proposed multi-shaped MFG circuit is capable of generating
the trapezoidal, triangular, S-and Z-shaped membership functions. Also, a full
programmability disposition in all parameters of height, position and width is achievable. To
make this purpose, a simple structure of complementary differential pairs is utilized which …
Abstract
This paper presents a new approach for implementing an analog fully programmable membership function generator (MFG) with twin-cell topology which can operate in Transconductance-mode. The proposed multi-shaped MFG circuit is capable of generating the trapezoidal, triangular, S- and Z-shaped membership functions. Also, a full programmability disposition in all parameters of height, position and width is achievable. To make this purpose, a simple structure of complementary differential pairs is utilized which changing of their applied input constant voltages and bias current led into programming, independently. Moreover, the proposed MFG architecture has a stellar functionality which makes it suitable for implementing as a general-purpose fuzzy logic controller. Since in this proposed MFG approach, only 26 transistors are used, the chip area and total power dissipation can be decreased to 552 µm2 and 83.8 µW, respectively, which is reduced in comparison with the other works. The proposed MFG circuit is simulated in 65 nm standard CMOS technology with a single supply voltage of 1.2 V. The post-layout simulation results show that the proposed twin-cell MFG circuit is in great collusion which indicates a high delicacy of the proposed design, and the circuit presents the profit of negligible linearity error less than 5.2%. Furthermore, this proposed circuit is compared with a simulated MFG circuit named the comparative MFG, and the exported results show the improved functionality of the proposed twin-cell MFG, specifically.
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