Design of an 8-wide superscalar RISC microprocessor with simultaneous multithreading
RP Preston, RW Badeau, DW Bailey… - … Solid-State Circuits …, 2002 - ieeexplore.ieee.org
RP Preston, RW Badeau, DW Bailey, SL Bell, LL Biro, WJ Bowhill, DE Dever, S Felix…
2002 IEEE International Solid-State Circuits Conference. Digest of …, 2002•ieeexplore.ieee.org… The combination of architectural enhancements and advanced process technology produce-single-threaded
performance simulated at over 2.5x that of the previous design [2]. 4-way simultaneous
multithreading (SMT) further increases utilization of the 8 integer and 4 floating point
execution units by allowing concurrent execution of up to 4 independent program threads.
Figure 20.1.1 is a block diagram for this … To support 8-wide superscalar issue, the
instruction fetch logic must assemble a group of 8 valid instructions each cycle. This block is …
performance simulated at over 2.5x that of the previous design [2]. 4-way simultaneous
multithreading (SMT) further increases utilization of the 8 integer and 4 floating point
execution units by allowing concurrent execution of up to 4 independent program threads.
Figure 20.1.1 is a block diagram for this … To support 8-wide superscalar issue, the
instruction fetch logic must assemble a group of 8 valid instructions each cycle. This block is …
A 250M transistor microprocessor implements the Alpha instruction set and features 8-wide superscalar issue and simultaneous multithreading in a 0.125/spl mu/m SOI process. Performance is estimated at over three times that of the previous design.
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