capable of outperforming conventional CMOS technology. Leveraging its advantages, this
paper addresses the challenges in adder circuits related to size, delay, and cost by
integrating QCA technology. A novel layout for a co-planar full adder in QCA is introduced,
featuring a half-adder design with 23 cells in a single layer without any crossover, achieving
a delay of 0.25 clock cycles. By utilizing inter-cellular effects inherent in QCA technology, the …