Evaluation of layered tunnel barrier charge trapping devices for embedded non-volatile memories
M Boutchich, DS Golubović, N Akil… - Microelectronic …, 2010 - Elsevier
This paper presents experimental results on band gap engineered charge trapping devices
for embedded non-volatile memories. Different material systems with high-k dielectrics and
metal gates were fabricated using 193nm lithography and the electrical evaluation was
performed on 256 bits mini-arrays. The structure relies essentially on a layered tunnel ONO
(oxide-nitride-oxide) barrier that replaces the tunnel oxide in conventional SONOS devices.
In addition, we have implemented high-k dielectrics, metal gates and sealing layer in order …
for embedded non-volatile memories. Different material systems with high-k dielectrics and
metal gates were fabricated using 193nm lithography and the electrical evaluation was
performed on 256 bits mini-arrays. The structure relies essentially on a layered tunnel ONO
(oxide-nitride-oxide) barrier that replaces the tunnel oxide in conventional SONOS devices.
In addition, we have implemented high-k dielectrics, metal gates and sealing layer in order …
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