Extremely wideband 0.18-μm CMOS compact distributed low-noise amplifier
2010 IEEE Antennas and Propagation Society International Symposium, 2010•ieeexplore.ieee.org
A distributed low-noise amplifier (LNA) employing novel transmission lines and inductors
was designed in a standard 0.18-μm CMOS process. The new LNA provides significant
improvement in performance and size with less than 13 dB return loss from DC to 17 GHz,
average gain of 8±0.2 dB from DC to 20 GHz, noise figure of 3.4-5 dB from 0.5-19 GHz,
power consumption of 34.2 mW, and 1.05× 0.37 mm 2 chip size including RF pads.
was designed in a standard 0.18-μm CMOS process. The new LNA provides significant
improvement in performance and size with less than 13 dB return loss from DC to 17 GHz,
average gain of 8±0.2 dB from DC to 20 GHz, noise figure of 3.4-5 dB from 0.5-19 GHz,
power consumption of 34.2 mW, and 1.05× 0.37 mm 2 chip size including RF pads.
A distributed low-noise amplifier (LNA) employing novel transmission lines and inductors was designed in a standard 0.18-μm CMOS process. The new LNA provides significant improvement in performance and size with less than 13 dB return loss from DC to 17 GHz, average gain of 8 ± 0.2 dB from DC to 20 GHz, noise figure of 3.4-5 dB from 0.5-19 GHz, power consumption of 34.2 mW, and 1.05 × 0.37 mm 2 chip size including RF pads.
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