Field tolerant dynamic intrinsic chip ID using 32 nm high-K/metal gate SOI embedded DRAM
S Rosenblatt, D Fainstein, A Cestero… - IEEE journal of solid …, 2013 - ieeexplore.ieee.org
IEEE journal of solid-state circuits, 2013•ieeexplore.ieee.org
A random intrinsic chip ID generation method using retention fails is implemented in 32 nm
SOI embedded DRAM. A dynamic key algorithm employs a unique pair of 4 Kb binary
strings for an ID record for secure authentication. These strings are generated by controlling
a wordline low voltage to search for a number of fails matching the corresponding challenge
numbers. The algorithm further includes field-tolerant authentication by detecting a number
of common bits analytically guaranteed for successful recognition, while preventing ID …
SOI embedded DRAM. A dynamic key algorithm employs a unique pair of 4 Kb binary
strings for an ID record for secure authentication. These strings are generated by controlling
a wordline low voltage to search for a number of fails matching the corresponding challenge
numbers. The algorithm further includes field-tolerant authentication by detecting a number
of common bits analytically guaranteed for successful recognition, while preventing ID …
A random intrinsic chip ID generation method using retention fails is implemented in 32 nm SOI embedded DRAM. A dynamic key algorithm employs a unique pair of 4 Kb binary strings for an ID record for secure authentication. These strings are generated by controlling a wordline low voltage to search for a number of fails matching the corresponding challenge numbers. The algorithm further includes field-tolerant authentication by detecting a number of common bits analytically guaranteed for successful recognition, while preventing ID spoofing during the read operation. This results in 100% successful unique ID generation and recognition in two temperature and three voltage conditions per chip for a total of 420 k ID pair comparisons in 266 chips. The analytical model predicts a 99.999% successful recognition rate for 10 parts. Finally, a method to enable a field-tolerant ID using multiple domains will be discussed.
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