It is well known that when a discrete-time controller is implemented with finite precision, there is a limit in the achievable sample rate that maybe significantly lower than that limited by the computation resource. In this paper, we investigate this apparent coupling between finite precision implementation and the achievable sample rate. Specifically, we take a deterministic view of the effect of FWL and attempt to develop specific design guidelines for trading-off sample rate and word length selection based on the accuracy of the implementation realizing the desired pole and zero locations of the filter and the desired filter/controller feature.