This dissertation has been microfilmed exactly as received 70-10,607 KOO, James T., 1941-INTEGRATE CIRCUIT CONTENT ADDRESSABLE MEMORIES. Lehigh University, Ph. D., 1969 Engineering, electrical University Microfilms, Inc., Ann Arbor, Michigan INTEGRATE CIRCUIT CONTENT ADDRESSABLE MEMORIES by James T. Koo A Dissertation Presented to the Graduate Committee of Lehigh University in Candidacy for the Degree of Doctor in Philosophy in Electrical Engineering Lehigh University 1969 Approved and recommended for acceptance as a dissertation in partial fulfillment of the requirements for the degree of Doctor of Philosophy (date) Accepted,/(date)(Professor in charge) g Special committee directing the doctoral work of James T. Koo (Chairman) ___ $» 9. ACKNOWLEDGMENTS The author wishes to thank the members of his thesis committee for their advice and guidance. This committee consisted of Professors D. Leenor, Chairman, AI Larky, JA McLennan, Jr., and Dr. JH Wuorinen, Jr. He would like to express his gratitude to the Bell Telephone Laboratories for providing him this opportunity to pursue this pro gram. He is especially obliged to the management of his immediate area for their support and understanding. He is grateful for many illuminating discussions with JT Nelson, and PR Schroeder. He would like to acknowledge the assistance received from MD Bonfeld in preparing the manuscript, and from GE Celles, JJ Riggs and many others in the model shop in constructing the experimental memory system. Finally, he would like to express his appreciation for the fine service received from the drafting and typing areas. Table of Contents Page List of Figures v Abstract 1 1. Introduction 3 II. Previous Work in Content Addressable Memory 10 III. The Content Addressable Memory Cell 18 IV-The Resolver-Encoder 25 V. Operation of Proposed Memory 31 VI, Experiment 46 VII. Discussion 49 Figures 56 References 75 Biographical Note 81 iv-List of Figures Page 1. Column-Pair Sense Signal and Their Meaning of Miller’s Resolving Algorithm 56 2. Miller’s Resolving Algorithm 57 3. Proposed CIGFET CAM Cell 58 U. Proposed IGFET CAM Cell 59 5. Proposed Bipolar Transistor CAM Cell 60 6. Memory Organization of Proposed CAM 61 7. Voltage Transfer Curve for CIGFET Inverter 62 8. Another Bipolar Transistor CAM Cell Design 63 9. Simultaneous Search CAM Cell 64 10. Proposed CIGFET Resolver-Encoder 65 11. Proposed IGFET Resolver-Encoder 66 12. Proposed Bipolar Transistor Resolver-Encoder 67 13. Method of Resolver-Encoder Interconnection 68 14. Block Diagram of Proposed IC-CAM System 69 15. Block Diagram of a General CAM System 70 16. The Experimental Bipolar Transistor CAM Cell 71 17. The Experimental Resolver-Encoder 72 18. The Experimental CAM System 73 19. Transistor Transconductance Assignment of the 74 Re s olver-Encoder Abstract Feasibility, design, and algorithms of Content Addressable Memory (CAM) Systems employing integrated circuit technology have been investigated. Integraged circuit CAM systems employing single channel insulated gate field effect transistors, complementary insulated gate field effect transistors, and bipolar transistors are proposed in this study. The basic memory cell designs consist of a flip flop as the memory medium and a logic section with a total of six to nine transistors. The logic section consumes little or no standby power and incurrs no stage delay during the match operation. The two bit-lines of the cells also serve as input to the logic section, and the bit write circuit is used as the search and mask registers. The cells can be arranged in a matrix …