Less for More: Reducing Intra-CGRA Connectivity for Higher Performance and Efficiency in HPC

B Adhi, C Cortes, E Del Sozzo, T Ueno… - 2023 IEEE …, 2023 - ieeexplore.ieee.org
Coarse-Grained Reconfigurable Arrays (CGRAs) are a class of reconfigurable architectures
that inherit the performance of Domain-specific accelerators and the reconfigurability
aspects of Field-Programmable Gate Arrays (FPGAs). Historically, CGRAs have been
successfully used to accelerate embedded applications and are now considered to
accelerate High-Performance Computing (HPC) applications in future supercomputers.
However, embedded systems and supercomputers are two vastly different domains with …

[引用][C] Less for More: Reducing Intra-CGRA Connectivity for Higher Performance and Efficiency in HPC

上野知洋 - Proceedings of CGRA4HPC Workshop IPDPS 2023, 2023 - cir.nii.ac.jp
Less for More: Reducing Intra-CGRA Connectivity for Higher Performance and Efficiency in
HPC | CiNii Research … Less for More: Reducing Intra-CGRA Connectivity for Higher
Performance and Efficiency in HPC … タイトル Less for More: Reducing Intra-CGRA
Connectivity for Higher Performance and Efficiency in HPC
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