… In this paper, two new structures for the SRAM cell called IWL-VC SRAM and PP-SRAM were
presented. The first cell structure made use of one PMOS per row of SRAM cells as well as …

… low power static random access memory (SRAM) cell. It occupies large portion in modern
system on chip devices. In this context, a detailed review on various SRAM cell … SRAM cell …

… Conventional SRAM cell designs are power hungry and poor performers in this new era of
fast mobile computing. In this paper, low power SRAM cell designs have been analyzed for …

… cells provide a SRAM menu that allows us to optimally balance the requirements of various
types of SRAM in lowpower … Applying this structure in SRAM memory cells reduces variation …

… the cell stability but suffer from bitline leakage noise. In this paper, an SRAM memory has
been designed to overcome power consumption problem. It also improves the Cell stability by …

… SRAM cell structure is proposed. In this structure, to improve the stability and low power
consumption, two transistors are added to the cell… of two low-power SRAM cell structures. In IEEE …

… ABSTRACT We have been proposed a low power SRAM using an effective method called
"… the SRAM is not activated (sleep mode) while retaining the data stored in the memory cells. …

… In this paper, the latest developments in low-power circuit techniques and methods SRAMs
were reviewed. All major sources of power dissipation in these memories were analyzed. …

… Access Memory (SRAM) cell with low power and delay. The proposed 6T SRAM cell uses
self -… The proposed 7T SRAM cell works adiabatic technique which diminishes the dynamic …

… a low power SRAM using hier- archical bit line and local sense amplifiers (HBLSA-SRAM). It
re… The HBLSA-SRAM reduces the write power consumption in bit lines without noise margin …