Memory hierarchy for web search

G Ayers, JH Ahn, C Kozyrakis… - … Symposium on High …, 2018 - ieeexplore.ieee.org
… over slower DRAM chips, we optimize the L4 cache for low … All remaining main memory is
allocated to the index shard, … link, such as Intel’s OPIO [32] or IBM’s Agnostic Memory Channel […

Parallel main-memory indexing for moving-object query and update workloads

D Šidlauskas, S Šaltenis, CS Jensen - Proceedings of the 2012 ACM …, 2012 - dl.acm.org
… Rather, object data is stored in a linked lists of buckets, and a … average time between two
consecutive updates of an object (… The TPR*-tree: an optimized spatio-temporal access method …

Dynamic tracking of page miss ratio curve for memory management

P Zhou, V Pandey, J Sundaresan, A Raghuraman… - ACM SIGPLAN …, 2004 - dl.acm.org
Optimizing energy consumption of computing components has … that Hit[i] corresponds to
HitCtrs[i] and i is now an index over … doubly linked list and its page group ID is set to be 0. For all …

Linearly compressed pages: A low-complexity, low-latency main memory compression framework

G Pekhimenko, V Seshadri, Y Kim, H Xin… - Proceedings of the 46th …, 2013 - dl.acm.org
consecutive compressed cache lines between the memory … e-index in the exception storage,
its main memory address … Unfortunately, modern DRAM chips are optimized for full cache …

[图书][B] Algorithms for memory hierarchies: advanced lectures

U Meyer, P Sanders - 2003 - books.google.com
… On the lowest level we have storage networks connecting a … RAMs have developed into
devices optimized for block access. For … Searching: Any pointer based data structure indexing N …

PageNUCA: Selected policies for page-grain locality management in large shared chip-multiprocessor caches

M Chaudhuri - 2009 IEEE 15th International Symposium on …, 2009 - ieeexplore.ieee.org
… ring to connect the cores and the L2 cache banks shows that … that the storage overhead of
a performance-optimized block … unused index range covering a page in the destination bank

Hierarchical hybrid memory management in OS for tiered memory systems

L Liu, S Yang, L Peng, X Li - IEEE Transactions on Parallel and …, 2019 - ieeexplore.ieee.org
… ), where memory channels connect different types of memory). … Specifically, we optimize the
DMA with lock-less migration, … By examining the values of the bank index bits in PFN (Page

Data and memory optimization techniques for embedded systems

PR Panda, F Catthoor, ND Dutt, K Danckaert… - ACM Transactions on …, 2001 - dl.acm.org
… The resulting optimized code can then be passed through a … Finally, in Section 2.3, we
study the link with and the impact … on the value of the outer loop index. The arrows in the figure …

Utility-based hybrid memory management

Y Li, S Ghose, J Choi, J Sun, H Wang… - … Conference on Cluster …, 2017 - ieeexplore.ieee.org
main memory system designs to meet increasing memory … Each memory consists of multiple
banks, where each bank is … advantage of this diversity to optimize system performance. …

Optimizing indirect memory references with milk

V Kiriansky, Y Zhang, S Amarasinghe - Proceedings of the 2016 …, 2016 - dl.acm.org
… Our compiler transformations dynamically partition the index … The memory hierarchy is
optimized for sequential accesses, … Memory management is a simple linked list of chunks. Tub …