Deadlock-free routing is a significant challenge in Network-on-Chip (NoC) design as it
affects the network's latency, power consumption, and load balance, impacting the
performance of multi-processor systems-on-chip. However, achieving deadlock-free routing
will routinely result in expensive overhead as previous solutions either sacrifice performance
or power efficiency to proactively avoid deadlocks or impose high hardware complexity to
resolve deadlocks when they occur reactively. Utilizing the various characteristics of NoC to …