Carry-select adders are one of the faster types of adders. This paper proposes a scheme
that encodes the sum bits using two-rail codes; the encoded sum bits are then checked by
self-checking checkers. The multiplexers used in the adder are also totally self-checking.
The scheme is illustrated with the implementation of a 2-bit carry select adder that can detect
all single stuck-at faults on-line; the detection of double faults is not guaranteed. Adders of
arbitrary size can be constructed by cascading the appropriate number of such 2-bit adders …

In this paper, the totally self-checking (TSC) carry-select adder (CSA) design is proposed.
The capability of TSC can detect all single stuck-at faults on-line in normal operation mode.
The proposed CSA has not only self-checking capability but also educed transistor count.
The design is based on TSMC 0.18 um process technology, and a real chip is implemented.
The transistor count of roposed totally self-checking CSA design is less than conventional
CSA, and even reduced 34.85% compared with [4] for thirty-two bits design. The reduced …