An accurate BJT-based CMOS temperature sensor with duty-cycle-modulated output

G Wang, A Heidari, KAA Makinwa… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
… Due to the application of DEM and chopping in the circuit, the presence of component mismatch
means that the duty cycle of the sensor’s output will vary from period to period. However, …

[PDF][PDF] DUTY CYCLE CORRECTOR USING PULSE WIDTH MODULATION

M Patil, K Bailey, R Anuvanahally - academia.edu
… The first part in the top level circuit consists of a duty cycle corrector, which is nothing but
the series of modified inverters that act as pulsewidth modification cells. One way to control the …

Design for reliability: A duty-cycle management system for timing violations

S Cha, DH Kim, T Liu, L Milor - … on Design of Circuits and …, 2016 - ieeexplore.ieee.org
… 4 shows an example of how to detect when duty cycle correction is required for the falling
data signal case (1>0). Because of delay degradation, the comparator cannot differentiate the …

Review of power semiconductor device reliability for power converters

B Wang, J Cai, X Du, L Zhou - CPSS Transactions on Power …, 2017 - ieeexplore.ieee.org
circuit model shown in Fig. 4, we can get some simple expression of partial ageing precursor
(short circuit … Irradiance, junction temperature, input current and duty cycle of the boost …

The reliability of semiconductor devices in the Bell System

DS Peck, CH Zierdt - Proceedings of the IEEE, 1974 - ieeexplore.ieee.org
… the necessary fault indication and correction capability must be … on the part of the device and
circuit designers of the impact … Duty cycles are low and surge protection was provided. From …

A CMOS temperature sensor based on duty-cycle modulation with calibration

AQ Guo, Q Sun, M Qi, D Qiao - … Integrated Circuits and Signal Processing, 2020 - Springer
In this paper, a digital CMOS temperature sensor based on duty-cycle modulation with digital
calibration is presented. The temperature sensor generates a duty-cycle-modulated signal …

A high linearity, fast-locking pulsewidth control loop with digitally programmable duty cycle correction for wide range operation

KH Cheng, CW Su, KF Chang - … Journal of Solid-State Circuits, 2008 - ieeexplore.ieee.org
… Many duty cycle alignment circuits have been developed to solve the duty cycle distortion
(DCD) of the clock, such as a duty cycle corrector (DCC) [4]–[11]. The DCC can simply align …

A general technique for derivation of average current mode control laws for single-phase power-factor-correction circuits without input voltage sensing

J Rajagopalan, FC Lee, P Nora - IEEE Transactions on Power …, 1999 - ieeexplore.ieee.org
… The control law that we have just described, requires the duty ratio during one … cycles, use
of the average value of input current during one switching period to determine duty ratio in the …

Characterization of spatial intrafield gate CD variability, its impact on circuit performance, and spatial mask-level correction

M Orshansky, L Milor, C Hu - … Transactions on Semiconductor …, 2004 - ieeexplore.ieee.org
… digital and mixed-signal circuits, statistical CAD algorithms for … semiconductor devices. He
has published more than 20 technical papers in the areas of statistical CAD algorithms, device

Power factor correction circuits

I Batarseh, H Wei - Power Electronics Handbook, 2011 - Elsevier
… With the rapid development in power semiconductor devices, … high frequency PFC circuits,
the buck corrector offers inrush-… , this logic circuit will result in instability when the duty ratio