Optical transmitter based on a 1.3-μm VCSEL and a SiGe driver circuit for short-reach applications and beyond

A Malacarne, C Neumeyr, W Soenen… - Journal of Lightwave …, 2018 - opg.optica.org
tests at a bit rate of 28 Gb/s. Section III describes the … step, where most of the semiconductor
material is being etched … Nonetheless, the pseudo-balanced circuit is capable of …

Energy-efficient full-swing logic circuits with unipolar TFTs on flexible substrates

Q Li, CH Lee, M Asad, WS Wong… - … of Solid-State Circuits, 2020 - ieeexplore.ieee.org
… retical circuit analysis, simulation, fabrication, and testing of … has to be carefully selected to
balance both the pull-up and … bonds in the disordered semiconductor resulting in slightly lower …

Testing bridges to nowhere-combining boundary scan and capacitive sensing

S Sunter, KP Parker - 2009 International Test Conference, 2009 - ieeexplore.ieee.org
… a differential driver in its normal balanced complementary … The number of TCK cycles in
Run-Test/Idle can be increased … which signal swing is larger), it proves that the differential driver

Advances in complementary-metal–oxide–semiconductor-based integrated biosensor arrays

SK Arya, CC Wong, YJ Jeon, T Bansal… - Chemical …, 2015 - ACS Publications
… thus cannot be used for electrochemical testing. Therefore, coating a … (b) Signal conditioning
circuit composed of the balance … and improved SNR via use of an on-chip signal filter and …

Low-power high-speed hybrid temperature heterogeneous technology digital data link

D Gupta, JC Bardin, A Inamdar… - IEEE transactions on …, 2013 - ieeexplore.ieee.org
… If optimum metallic leads are chosen for biasing to balance the … In this work, the design of
the first three semiconductor … So far, we have fabricated and tested the lower Jc version only. …

A compact Verilog-A model of silicon carrier-injection ring modulators for optical interconnect transceiver circuit design

B Wang, C Li, CH Chen, K Yu… - Journal of Lightwave …, 2015 - ieeexplore.ieee.org
… PCB and the silicon ring modulator for testing. While the pre-… responses in order to balance
the achievable extinction ratio … of advanced modulator structures from semiconductor device …

A 160-mhz, 32-b, 0.5-w CMOS RISC microprocessor

J Montanaro, RT Witek, K Anne… - … Solid-State Circuits, 1996 - ieeexplore.ieee.org
… V, providing various options to balance performance and power … first pass reticle set for a
test chip which contained several … driver and ESD protection circuits at Digital Semiconductor's

Silicon photonic Mach-Zehnder modulator driver for 800+ Gb/s optical links

T Sun, J Rogers, M Rogers, I Dedic… - … Semiconductor …, 2021 - ieeexplore.ieee.org
… of the driver is measured using 100Ω differential load and is better than 5% for output swings
of <… optimal balance of equalization and peaking will help to minimize the PAPR (peak to …

[图书][B] System-on-chip test architectures: nanometer design for testability

LT Wang, CE Stroud, NA Touba - 2010 - books.google.com
… as a textbook for an advanced course in testing. Every chapter … This chapter outlines key test
specifications for RF circuits … Over the past three decades, we have seen the semiconductor

Enhance reliability of semiconductor devices in power converters

MH Nguyen, S Kwak - Electronics, 2020 - mdpi.com
… under test is in the off state to create short-circuit conditions. … in the parallel converter system
to balance the aging of converter … thermal swings with variable amplitudes, another test has …