Capacitors with an equivalent oxide thickness of< 0.5 nm for nanoscale electronic semiconductor memory

SK Kim, SW Lee, JH Han, B Lee, S Han… - Advanced Functional …, 2010 - Wiley Online Library
area compared to previous generations. These topics … on various substrates as a function
of film thickness.45, 56 (A-Ru: ALD Ru, S-Ru: sputtered Ru, two Ru substrates have different

Prospective of semiconductor memory devices: from memory system to materials

CS Hwang - Advanced Electronic Materials, 2015 - Wiley Online Library
… Additional scaling of the memory cell area could be achieved … where the actual physical
distance between the source and … thin films on Si substrates has not been successful, implying …

Nonvolatile semiconductor memory devices

JJ Chang - Proceedings of the IEEE, 1976 - ieeexplore.ieee.org
memory device with gradually increasing oxide thickness. When the MNOS memory region
is switched between … oxide between the silicon islands and the silicon substrate thicker than …

Review of semiconductor flash memory devices for material and process issues

SS Kim, SK Yong, W Kim, S Kang, HW Park… - Advanced …, 2023 - Wiley Online Library
… , BO must be thicker than TO and has a higher effective dielectric … schematic diagram of the
memory cell area viewed from the top, … semiconductor memory devices, new memory devices

Current status of nonvolatile semiconductor memory technology

Y Fujisaki - Japanese Journal of Applied Physics, 2010 - iopscience.iop.org
… with miniaturization, and the reduction in cell area owing to the simplified structure. However,
… in reducing the film thickness, it has not been investigated for use in memory devices. Our …

Silicon single electron memory cell

NJ Stone, H Ahmed - Applied Physics Letters, 1998 - pubs.aip.org
… We describe here a compact cell with a 30-fold reduction in cell area and also present the
… of a 40 nm thick silicon layer separated from the underlying silicon substrate by 350 nm of …

Flexible memristive memory array on plastic substrates

S Kim, HY Jeong, SK Kim, SY Choi, KJ Lee - Nano letters, 2011 - ACS Publications
… The n-channel metal–oxide–semiconductor field effect transistors (NMOSFET) have … of an
8 × 8 memory cell matrix in a NOR type array with an active area of 1 × 1 cm 2 on a 25 μm thick

A poly-silicon TFT with a sub-5-nm thick channel for low-power gain cell memory in mobile applications

T Ishii, T Osabe, T Mine, T Sano… - … on Electron Devices, 2004 - ieeexplore.ieee.org
… per unit area by taking advantage of the following effect. In a … have a substrate and has an
extremely small junction area. A SESO memory cell has two leakage paths, one between the …

A low voltage SONOS nonvolatile semiconductor memory technology

MH White, Y Yang, A Purwar… - IEEE Transactions on …, 1997 - ieeexplore.ieee.org
… If -channel operation is required with a -type starting substrate… The ONO dielectric for the
scaled devices have thicknesses … Thus, with 0.2 m feature sizes, we expect that a cell area of …

Organic resistive memory devices: performance enhancement, integration, and advanced architectures

B Cho, S Song, Y Ji, TW Kim… - Advanced Functional …, 2011 - Wiley Online Library
… Roadmap for Semiconductors118 has also stressed the … use with large-area flexible substrates
has been limited because … the bending condition (the substrate distance and the bending …