… forward equalizer and the receiver uses an adaptive four-tap decision feedback equalization
to … 1 shows the block diagram of the architecture of the serial data link. It consists of a TX …

… data-transition dependent decision feedback equalization algorithm hereafter referred to as
data… Since we are only interested in the behavior of data links at low frequencies where most …

… In this work, the effectiveness of embedded analog decision feedback equalization (DFE)
in performance improvement of the ADC-based receivers is evaluated in terms of BER as one …

… decision feedback equalizer for a known dispersive channel will be examined. The error rate
of this equalizer is a lower bound on the error rate of an equalizer t,… In this series of tests the …

… equalization scheme for a modem serial link. Specifically, the remainder of this document
will deal exclusively with the decision feedback equalizer … amongst equalization techniques. …

… [11] RS Kajley, PJ Hurst, and JEC Brown, “A mixed-signal decisionfeedback equalizer that
… -mode (PAM2/4) serial link transceiver with adaptive equalization and data recovery,” IEEE J…

… data rate over a 10-mm interconnect was demonstrated in a 65-nm GP process. A three-tap
half-rate feed-forward equalizer … -rate timebased decision feedback equalizer was employed …

… of the link in ZPAM mode, we added one tap of immediate feedback equalization in the
receiver… [6], one tap of feedback equalization can be achieved by using loop unrolling to avoid the …

… As serial link data rates approach and even surpass … 2500 10 Gb/s, sophisticated equalizers
such as decision- … CMOS for serial data transmission across high loss legacy with small …

… To validate the proposed adaptive edge-DFE, a 5 Gbps data link with the proposed DFE
embedded was designed in a 65 nm CMOS technology. The channel used in this work is based …