Statistical Device Simulation and Machine Learning of Process Variation Effects of Vertically Stacked Gate-All-Around Si Nanosheet CFETs

SR Kola, Y Li, R Butola - IEEE Transactions on Nanotechnology, 2024 - ieeexplore.ieee.org
SR Kola, Y Li, R Butola
IEEE Transactions on Nanotechnology, 2024ieeexplore.ieee.org
In this study, we report the process variation effect (PVE) including the work function
fluctuation (WKF) on the DC/AC characteristic fluctuation of stacked gate-all-around silicon
complementary field-effect transistors (CFETs). The PVE affects characteristic fluctuation
significantly; in particular, for the variability of off-state current. Owing to the bottom channel
of a fin-type, the P-FET suffers from the worst off-state current fluctuation (more than 200%
variation) compared to the N-FET. The device variability induced by the WKF is marginal …
In this study, we report the process variation effect (PVE) including the work function fluctuation (WKF) on the DC/AC characteristic fluctuation of stacked gate-all-around silicon complementary field-effect transistors (CFETs). The PVE affects characteristic fluctuation significantly; in particular, for the variability of off-state current. Owing to the bottom channel of a fin-type, the P-FET suffers from the worst off-state current fluctuation (more than 200% variation) compared to the N-FET. The device variability induced by the WKF is marginal because of amorphous-type metal grains. As input features to an artificial neural network (ANN) model, low and high work function values, as well as parameters of PVE that have prevalent effects on CEFT transfer characteristics are further considered and modeled. The estimated values of R 2 -score prove that the ANN model properly grasps information from the dataset successfully; thus, it can be used to model emerging CFETs for circuit simulation.
ieeexplore.ieee.org
以上显示的是最相近的搜索结果。 查看全部搜索结果