Symbol timing recovery for low-SNR partial response recording channels

J Liu, H Song, BVKV Kumar - … Conference, 2002. GLOBECOM' …, 2002 - ieeexplore.ieee.org
J Liu, H Song, BVKV Kumar
Global Telecommunications Conference, 2002. GLOBECOM'02. IEEE, 2002ieeexplore.ieee.org
Future very high density data storage systems will exhibit significantly more intersymbol
interference (ISI) and significantly lower signal-to-noise ratio (SNR). Advanced signal
detection algorithms, such as noise predictive maximum likelihood (NPML) and iterative soft
decoding, are aimed at coping with such lower SNRs and higher ISI. However, at such low
SNRs, because of their large residual timing jitter, current timing recovery schemes suffer
frequently from loss of lock (the event where the estimated phase drift differs significantly …
Future very high density data storage systems will exhibit significantly more intersymbol interference (ISI) and significantly lower signal-to-noise ratio (SNR). Advanced signal detection algorithms, such as noise predictive maximum likelihood (NPML) and iterative soft decoding, are aimed at coping with such lower SNRs and higher ISI. However, at such low SNRs, because of their large residual timing jitter, current timing recovery schemes suffer frequently from loss of lock (the event where the estimated phase drift differs significantly from the actual phase drift for a significantly long duration leading to misindexing of the detected bits and thus error bursts) potentially offsetting the SNR gains provided by advanced detection methods. The main contribution of this paper is that by approximating the phase drifts present in recording systems as a piecewise linear phase drift model, we propose a novel timing recovery scheme, which is named frequency offset feedforward symbol timing recovery (FOSTR). For such a piecewise linear phase drift model, the problem of estimating the time-changing phase drift can be transformed to the problem of estimating the slopes (i.e., frequency offsets) and initial phase offsets of several linear ramps. The performance of the timing recovery based on this approach will be better than current methods in low SNR because the number of parameters to be estimated is significantly smaller. Bit-by-bit simulations with iterative soft decoding (low density parity check (LDPC) code of rate 16/17 and codeword size 4352 bits is used) show that FOSTR results in a significantly smaller residual timing jitter than that of the conventional decision-directed PLL-based feedback timing recovery schemes, although the adjusted ("adjusted" means the sectors suffering from loss of lock are not taken into account in bit error rate calculation) bit error rate (BER) performance of FOSTR is only about 0.6 dB better for a target adjusted BER of 1/spl times/10/sup -5/ than that of the conventional timing recovery scheme because iterative soft decoding is robust to residual timing jitter. However, the loss of lock rate (i.e., the fraction of sectors suffering from loss of lock) is significantly reduced by FOSTR.
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